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path: root/drivers/ram/sifive
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2020-08-25ram: sifive: Fix compiler warnings for 32-bitBin Meng
priv->info.size is of type 'size_t' but the length modifier is l. Fix this by casting priv->info.size. Note 'z' cannot be used as the modifier as SPL does not support that. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-07-24ram: sifive: Avoid using hardcoded ram base and sizeBin Meng
At present the SiFive FU540 RAM driver uses hard-coded memory base address and size to initialize the DDR controller. This may not be true when this driver is used on another board based on FU540. Update the driver to read the memory information from DT and use that during the initialization. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-06-04sifive: fu540: add ddr driverPragnesh Patel
Add driver for fu540 to support ddr initialization in SPL. This driver is based on FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>