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2018-09-28video_osd: Add ihs_video_out driverMario Six
Add a driver for IHS OSDs on IHS FPGAs. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-28drivers: Add OSD uclassMario Six
Some devices offer a text-based OSD (on-screen display) that can be programmatically controlled (i.e. text displayed on). Add a uclass to support such devices. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-28dm: video: support more escape sequencesHeinrich Schuchardt
The EFI subsystems needs to know the size of the terminal. If the environment variable stdout = serial,vidconsole this size cannot be read from the video console. So the EFI subsystem sends escape sequences to read the size. With this patch we get support for the following escape sequences: ESC "7" Save cursor position ESC "8" Restore cursor position Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-09-27drivers: qe: Move CONFIG_U_QE to KconfigRan Wang
Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [York S: revised subject line and removed commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27net: fman: Support both new and legacy FMan CompatiblesZhao Qiang
Recently the FMan Port and MAC compatibles were changed. This patch aligns the FMan Port and MAC compatibles to the new FMan device tree binding document. The FMan device tree binding document can be found in the Linux kernel version 3.18.0, commit 297d35fd2a7d3fbd4e5c0f0c1c18213117ba11ba ./Documentation/devicetree/bindings/powerpc/fsl/fman.txt This patch doesn't affect legacy compatibles support. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [York S: reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27ls1012a: remove debug info from u-boot logPramod Kumar
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27armv8: ls1043a: enable icid setup for qman portalsLaurentiu Tudor
Enable support for ICID setup of qman portals and the required device tree fixups. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27driver: net: fsl-mc: Memset MC reserve ram memory before usagePrabhakar Kushwaha
Memory reserved for Management Complex needs to be cleaned before any usage. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [York S: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27u-boot: fixup the iommu-map property of fsl-mc nodeNipun Gupta
The iommu-map property in the fsl-mc node is updated by valid stream-ids by u-boot. This patch is to fixup this property for LS208x and LS1088. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27scsi: ceva: add ls1021a soc support.Peng Ma
Add ahci compatible support for ls1021a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27scsi: ceva: add ls1043a soc supportPeng Ma
Add ahci compatible support for ls1043a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27ppa/fm/qe: use block layer in ppa/fm/qe driverYinbo Zhu
At present the MMC subsystem maintains its own list of MMC devices. This cannot work with driver model when CONFIG_BLK is enabled, use blk_dread to replace previous mmc read interface, use mmc_get_blk_desc to get the mmc device property. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> [York S: reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27Merge tag 'xilinx-for-v2018.11' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2018.11 - Handle BOARD_LATE_INIT via Kconfig SPL: - Enable GZIP for all partitions types(not only for kernel) ZynqMP: - Rearrange pmufw version handling - Support newer PMUFW with improved fpga load sequence Zynq: - Cleanup config file - Simplify zybo config by enabling option via Kconfig net: - Fix gems max-speed property reading - Enable support for fixed-link phys
2018-09-27net: zynq_gem: Add support for fixed-link phyMichal Simek
Based on dt-specs fixed-link doesn't require phy-handle to be used. Fix driver to only read phy related setting when phy-handle is found. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-09-26Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-09-26 A lot of goodness in this release. We're *very* close to running the UEFI Shell and SCT natively. The only missing piece are HII protocols. - FAT write support (needed for SCT) - improved FAT directory support (needed for SCT) - RTC support with QEMU -M virt - Sandbox support (run UEFI binaries in Linux - yay) - Proper UTF-16 support - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell) - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell) - Fix window size determination - Fix Tegra by explicitly unmapping RAM - Clean up handle entanglement - Lots of generic code cleanup [trini: Fixup merge conflict in include/configs/qemu-arm.h] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-26net: zynq_gem: Fix reading of max-speed propertySiva Durga Prasad Paladugu
max-speed property is part of phynode and it has to be read using ofnode_read_u32_default(). This fixes the issue of incorrect max-speed read from DT. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26fpga: zynqmp: Modify PL bitstream loading sequenceSiva Durga Prasad Paladugu
This patch modifies PL bitstream loading sequence as per latest Xilfpga which supports all variants of bitstream images generated from vivado and from bootgen. With this new change in Xilfpga, uboot doesn't need to validate and swap bitstream as it will be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting PMUFW version before skipping the validation and swap sequence as there can be old PMUFW which doesn't supports this feature. In this case, driver uses old way of PL bitstream loading sequence. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-25serial: omap: Add support for AM654 uart controllerLokesh Vutla
AM654 uses a UART controller that is compatible (partially) with existing OMAP UART, Introduce a compatible for adding support for this controller. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-25ata: ahci: Don't cap AHCI port count under CONFIG_DM_SCSITuomas Tynkkynen
When using device model this sort of hardcoded limits aren't used or necessary. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25ata: ahci: Loop over the actual number of ports, not the maximumTuomas Tynkkynen
The loop in ahci_start_ports() is looping over the maximum number of SCSI devices in the system, which can be larger than the amount of ports a particular AHCI controller has. The extra looping isn't directly harmful because the link_port_map bitmap won't have the bit set for a nonexistent port, but it is wasteful. Replace the loop limit with the port count of the AHCI controller instead. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25mmc: omap_hsmmc: Fix pbias for omap3_logic to enable CD pinAdam Ford
The MMC card detect pin is connected to gpio127 on omap3_logic. When setting up the pbias register for MMC, let's also enable gpio_127 for the card detect. As part of the package deal, gpio_126 and gpio_129 are also enabled. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-25spi: add support for ARM PL022 SPI controllerQuentin Schulz
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO. A few parts were borrowed from the Linux kernel driver. Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-25drivers: net: cpsw: add support to update phy addressSekhar Nori
On some boards using TI CPSW, it may be possible that PHY address was not latched correctly, and the actual address that the phy responds on is different from that set in device-tree. For example, see this problem report on beaglebone black: https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J Add support to check for this condition and use the detected phy address when its safe to do so. Also, add a public API that exposes the phy address of a given slave. This can be used to update device-tree that is passed to Linux kernel. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-23rtc: pl031: convert the driver to driver modelAKASHI Takahiro
With this patch, PL031 driver is converted to driver-model-compliant driver. In addition, CONFIG_SYS_RTC_PL031_BASE is no longer valid. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23dm: video: check bounds for column and rowHeinrich Schuchardt
CSI H can be used to position the cursor. The calling application may specify a location that is beyond the limits of the screen. This may lead to an illegal memory access. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23efi_loader: struct efi_simple_text_input_protocolHeinrich Schuchardt
%s/efi_simple_input_interface/efi_simple_text_input_protocol/ We should be consistent in the naming of the EFI protocol interface structures. The protocol is called EFI_SIMPLE_TEXT_INPUT_PROTOCOL. %s/ExtendedVerification/extended_verification/ Use consistent naming of function parameters. Do not use CamelCase. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-22pinctrl: bcm6838: add pinctrl supportPhilippe Reynes
Add pinctrl support for broadcom bcm6838 SoC. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-20mtd: mtdpart: balance debug messagesMiquel Raynal
Balance debug message in the partition allocation/removal process in order to keep track of them more easily. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20mtd: declare MTD_PARTITIONS symbol in KconfigMiquel Raynal
UBI selects MTD_PARTITIONS which is the symbol to compile drivers/mtd/mtdpart.c. Unfortunately, the symbol was not defined in Kconfig and this worked only with board files defining it. Fix this by adding a boolean in Kconfig so boards defined by defconfig files only will work as expected. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-09-20mtd: spinand: Add initial support for the MX35LF2GE4AB chipMiquel Raynal
Add support for the MX35LF2GE4AB chip, which is similar to its cousin MX35LF1GE4AB, with two planes instead of one. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: spinand: Add initial support for the MX35LF1GE4AB chipBoris Brezillon
Add minimal support for the MX35LF1GE4AB SPI NAND chip. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: spinand: Add initial support for Winbond W25M02GVFrieder Schrempf
Add support for the W25M02GV chip. Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: spinand: Add initial support for Micron MT29F2G01ABAGDPeter Pan
Add a basic driver for Micron SPI NANDs. Only one device is supported right now, but the driver will be extended to support more devices afterwards. Signed-off-by: Peter Pan <peterpandong@micron.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: nand: Add core infrastructure to support SPI NANDsPeter Pan
Add a SPI NAND framework based on the generic NAND framework and the spi-mem infrastructure. In its current state, this framework supports the following features: - single/dual/quad IO modes - on-die ECC Signed-off-by: Peter Pan <peterpandong@micron.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20spi: Extend the core to ease integration of SPI memory controllersBoris Brezillon
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general. This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: nand: Add core infrastructure to deal with NAND devicesBoris Brezillon
Add an intermediate layer to abstract NAND device interface so that some logic can be shared between SPI NANDs, parallel/raw NANDs, OneNANDs, ... Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: rename nand into rawnand in Kconfig promptMiquel Raynal
Sync the Kconfig raw NAND entry title with the code architecture. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20mtd: move NAND files into a raw/ subdirectoryMiquel Raynal
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20mtd: move all flash categories inside MTD submenuMiquel Raynal
There is no reason to have NAND, SPI flashes and UBI sections outside of the MTD submenu in Kconfig. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: move definitions to enlarge their rangeMiquel Raynal
Some helpers might be useful in a future 'mtd' U-Boot command to parse MTD device list. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20mtd: Fallback to ->_read/write() when ->_read/write_oob() is missingMiquel Raynal
Some MTD sublayers/drivers are implementing ->_read/write() and not ->_read/write_oob(). While for NAND devices both are usually valid, for NOR devices, using the _oob variant has no real meaning. But, as the MTD layer is supposed to hide as much as possible the flash complexity to the user, there is no reason to error out while it is just a matter of rewritting things internally. Add a fallback on mtd->_read() (resp. mtd->_write()) when the user calls mtd_read_oob() (resp. mtd_write_oob()) while mtd->_read_oob() (resp. mtd->_write_oob) is not implemented. There is already a fallback on the _oob variant if the former is used. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-09-20mtd: Add sanity checks in mtd_write/read_oob()Boris Brezillon
Unlike what's done in mtd_read/write(), there are no checks to make sure the parameters passed to mtd_read/write_oob() are consistent, which forces implementers of ->_read/write_oob() to do it, which in turn leads to code duplication and possibly errors in the logic. Do general sanity checks, like ops fields consistency and range checking. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Peter Pan <peterpandong@micron.com> Signed-off-by: Richard Weinberger <richard@nod.at> [Miquel: squashed the fix about the chip's size check] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20mtd: Uninline mtd_write_oob and move it to mtdcore.cEzequiel Garcia
There's no reason for having mtd_write_oob inlined in mtd.h header. Move it to mtdcore.c where it belongs. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20mtd: Fallback to ->_read/write_oob() when ->_read/write() is missingBoris Brezillon
Some MTD sublayers/drivers are implementing ->_read/write_oob() and provide dummy wrappers for their ->_read/write() implementations. Let the core handle this case instead of duplicating the logic. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Miquel Raynal <miquel.raynal@free-electrons.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-09-19Merge git://git.denx.de/u-boot-marvellTom Rini
- Multiples updates to the turris boards / platform - Changes / enhancements to the Marvell PHY drivers, mainly to support the turris platform - Many fixes and enhancements to the pxa3xx NAND driver - Fixes for the UART boot mode in kwboot - Misc minor changes to other 32bit and 64bit boards
2018-09-19phy: marvell: add SATA comphy RX/TX polarity invert supportRabeeh Khoury
This patch adds support to Armada 7k/8k comphy RX/TX lane swap. The 'phy-invert' DT property defines the inverted signals. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19fix: nand: pxa3xx: Add WA for eliminating flash ready timeoutDavid Sniatkiwicz
add delay before processing the status flags in pxa3xx_nand_irq(). Signed-off-by: David Sniatkiwicz <davidsn@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> c: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19nand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NANDKonstantin Porotchkin
Add support for NAND chips with 8KB page, 4 and 8 bit ECC (ONFI). Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19nand: pxa3xx: cosmetic: add comments to the timing layout structuresKonstantin Porotchkin
Add comments with timing parameter names and some details about nand layout fileds. Remove unneeded definition. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19fix: nand: Replace hardcoded page chunk size with calculated oneKonstantin Porotchkin
Replace the hardcoded value of page chink with value that depends on flash page size and ECC strength. This fixes nand access errors for 2K page flashes with 8-bit ECC. Move the initial flash commannd function assignment past the ECC structures initialization for eliminating usage of hardcoded page chunk size value. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>