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2019-11-05power: domain: add i.MX8 scu power domain driverPeng Fan
The power domain tree is not accepted by Linux Kernel upstream. only a single pd node is used currently, as following: pd: imx8qx-pd { compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd"; #power-domain-cells = <1>; }; So to migrate to use upstream linux dts, we also need a driver to support this. This patch is to support the new method, compared with legacy power domain tree, it will be simpiler, because each device will has resource id as power domain index, it will be directly passed to scfw, and no need to let power domain build that tree. If multiple power domain is needed, it is the dts node should has correctly power domains entry added and sequence correct. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05power: domain: make imx8-power-domain.c legacyPeng Fan
The current i.MX8 power domain driver is based on i.MX vendor power domain tree which will retire later. The Linux upstream use a single pd node for power domain driver, and U-Boot will adopt that. When U-Boot i.MX8 dts synced with Linux Kernel upstream and related driver ready, the legacy driver will be removed. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05misc: imx8: scu: simplify code to make it extendablePeng Fan
clk and pinctrl will be get(probed) during each device probe, we don't need to probe them in scu driver. Only need to bind the sub-nodes (clk and iomuxc) of MU node with their drivers. So drop the code to probe the clk/pinctrl, and this patch will make it easy to add more subnodes. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-04Merge tag 'u-boot-imx-20191104' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191104 ------------------- - i.MX NAND: nandbcb support for MX6UL / i.MX7 - i.MX8: support for HAB - Convert to DM (opos6ul, mccmon6) - Toradex i.MX6ull colibri - sync DTS with kernel Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
2019-11-04Merge branch '2019-11-04-ti-imports'Tom Rini
- Various CPSW related improvements, DTS resync
2019-11-04net: ti: cpsw: convert to use dev/ofnode apiGrygorii Strashko
Conver TI CPSW driver to use dev/ofnode api. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> [trini: Add <dm/ofnode.h> to provide the prototype to ofnode] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Add support for Intel FSP-S and FSP-T in binman - Correct priority selection for image loaders for SPL - Add a size check for TPL - Various small SPL/TPL bug fixes and changes - SPI: Add support for memory-mapped flash
2019-11-03nand: mxs_nand: add API for switching different BCH layoutsIgor Opaniuk
On i.MX7 in a sake of reducing the disturbances caused by a neighboring cells in the FCB page in the NAND chip, a randomizer is enabled when reading the FCB page by ROM bootloader. Add API for setting BCH to specific layout (and restoring it back) used by ROM bootloader to be able to burn it in a proper way to NAND using nandbcb command. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03mach-imx: Adding new argument for SIP call interfaceYe Li
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li <ye.li@nxp.com> [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03power: pmic: Kconfig: add CONFIG_SPL_DM_PMIC_BD71837Peng Fan
Add CONFIG_SPL_DM_PMIC_BD71837 to make this driver could be used in SPL stage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03pmic: bd71837: drop DEBUG macroPeng Fan
Drop DEBUG macro definition which is used for debug purpose. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03video: mxsfb: set gd->fb_baseSébastien Szymanski
Set gd->fb_base so it can be shown with bdinfo command. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03watchdog: imx: Use immediate reset bits for expire_nowRobert Hancock
The expire_now function was previously setting the watchdog timeout to minimum and waiting for the watchdog to expire. However, this watchdog also has bits to trigger immediate reset. Use those instead, like the Linux imx2_wdt driver does. Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
2019-11-03watchdog: imx: Add DT ext-reset handlingRobert Hancock
The Linux imx2_wdt driver uses a fsl,ext-reset-output boolean in the device tree to specify whether the board design should use the external reset instead of the internal reset. Use this boolean to determine which mode to use rather than using external reset unconditionally. For the legacy non-DM mode, the external reset is always used in order to maintain the previous behavior. Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
2019-11-03net: ti: am65x-cpsw: fix mac tx internal delay for rgmii-rxid modeGrygorii Strashko
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping default value (enabled) for MAC TX internal delay when "rgmii-rxid" interface mode is selected. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: fix mac tx internal delay for rgmii-rxid modeGrygorii Strashko
Now TI CPSW driver will disable MAC TX internal delay for PHY interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping default value (enabled) for MAC TX internal delay when "rgmii-rxid" interface mode is selected. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: add support for standard eth "max-speed" dt propertyGrygorii Strashko
This patch adds support for standard Ethernet "max-speed" DT property to allow PHY link speed limitation. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: move parsing of dt port's parameters in separate funcGrygorii Strashko
Move parsing of dt port's parameters in separate func for better code readability. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: enable 10Mbps link speed support in rgmii modeGrygorii Strashko
According to TRMs the 10Mbps link speed is supported in RGMII only when CPSW2G MAC SL is configured for External Control ("in band") mode CPSW_SL_MACCTRL.EXT_EN(18) = 1. Hence update cpsw_slave_update_link() to follow documentation. [1] https://patchwork.kernel.org/patch/10285239/ Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03x86: timer: Use a separate flag for whether timer is initedSimon Glass
At present the value of the timer base is used to determine whether the timer has been set up or not. It is true that the timer is essentially never exactly 0 when it is read. However 'time 0' may indicate the time that the machine was reset so it is useful to be able to denote that. Update the code to use a separate flag instead. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03x86: timer: Set up the timer in timer_early_get_count()Simon Glass
This function can be called before the timer is set up. Make sure that the init function is called so that it works correctly. This is needed so that bootstage can work correctly in TPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03spi: Add support for memory-mapped flashSimon Glass
On x86 platforms the SPI flash can be mapped into memory so that the contents can be read with normal memory accesses. Add a new SPI method to find the location of the SPI flash in memory. This differs from the existing device-tree "memory-map" mechanism in that the location can be discovered at run-time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-01Merge tag 'arc-fixes-for-2020.01-rc2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-arc ARC fixes for v2020.01-rc2 The main change is move to DM_MMC of yet 2 another ARC boards: AXS101 & IoTDK. Among that we improve handling of stock-formatted SD-cards of high volume on EM SDP as well as introduction of reset driver for HSDK which is required for prepser reinitialization of some peripherals like USB etc.
2019-11-01ARC: HSDK: introduce reset driverEugeniy Paltsev
Introduce reset driver for Synopsys ARC HSDK SoC Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01Merge tag 'efi-2020-01-rc2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-01-rc2 Provide a better user interface for setting UEFI variables. Bug fixes: - ext4 file system not discovered on UEFI block device - 'make tests' build error on 32bit systems
2019-11-01Merge tag 'dm-pull-29oct19' of git://git.denx.de/u-boot-dmTom Rini
- Fix for patman with email addresses containing commas - Bootstage improvements for TPL, SPL - Various sandbox and dm improvements and fixes
2019-10-31drivers: phy: Handle gracefully NULL pointersJean-Jacques Hiblot
For some controllers PHYs can be optional. Handling NULL pointers without crashing nor failing, makes it easy to handle optional PHYs. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-31ata: ahci allow 64-bit DMA for SATARoman Kapl
Allow 64-bit DMA on AHCI. If not supported by the host controller, at least print a message and fail. Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-10-31nvme: use page-aligned buffer for identify commandPatrick Wildt
Change the stack-allocated buffer for the identification command to explicitly allocate page-aligned buffers. Even though the spec seems to allow having admin queue commands on non page-aligned buffers, it seems to not be possible on my i.MX8MQ board with a a Silicon Power P34A80. Since all of the NVMe drivers I have seen always do admin commands on a page-aligned buffer, which does work on my system, it makes sense for us to do that as well. Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-31nvme: flush dcache on both r/w, and the prp listPatrick Wildt
It's possible that the data cache for the buffer still holds data to be flushed to memory, since the buffer was probably used as stack before. Thus we need to make sure to flush it also on reads, since it's possible that the cache is automatically flused to memory after the NVMe DMA transfer happened, thus overwriting the NVMe transfer's data. Also add a missing dcache flush for the prp list. Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-31virtio: pci: use correct type in virtio_pci_bind()Heinrich Schuchardt
For printing as %u we should use an unsigned int. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-30gpio: da8xx_gpio: Fix the _gpio_direction_output functionKeerthy
_gpio_direction_output function currently calls gpio_set_value with the wrong gpio number. gpio_set_value in the uclass driver expects a different gpio number and the _gpio_direction_output is currently providing the number specific to the bank. Hence fix it by calling the _gpio_set_value function instead. Reported-by: Faiz Abbas <faiz_abbas@ti.com> Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci") Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-10-30Merge tag 'u-boot-clk-23Oct2019' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-clk - Add I2C clocks for i.MX6Q CCF driver - Fix check in clk_set_default_parents() - Managed API to get clock from device tree - Fixes for core clock code (including sandbox regression tests)
2019-10-30blk: set log2blksz in blk_create_device()Heinrich Schuchardt
The ext4 file system requires log2blksz to be set. So when setting the block size on the block descriptor we should fill this field too. This fixes a problem with EFI block devices providing ext4 partitions, cf. https://lists.denx.de/pipermail/u-boot/2019-October/387702.html. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-30Merge tag 'mmc-10-29-2019' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mmc - fsl_esdhc driver cleanup - spl_mmc bug fix to avoid access wrong emmc partition
2019-10-30Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- H6 dts(i) sync (Clément) - H6 PIO (Icenowy) - Fix pll1 clock calculation (Stefan) - H6 dram, half DQ (Jernej) - A64 OLinuXino eMMC (Sunil)
2019-10-29mmc: fsl_esdhc: drop i.MX DDR support codeYangbo Lu
A previous patch below adding DDR mode support was actually for i.MX platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC, it uses different process for DDR mode, and hasn't been supported. Let's drop DDR support code for i.MX in fsl_esdhc driver. 0e1bf61 mmc: fsl_esdhc: Add support for DDR mode Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29mmc: fsl_esdhc: remove redundant DM_MMC checkingYangbo Lu
Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29mmc: fsl_esdhc: make BLK as hard requirement of DM_MMCYangbo Lu
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-27fdt: Fix alignment issue when reading 64-bits properties from fdtJean-Jacques Hiblot
The FDT specification [0] gives a requirement of aligning properties on 32-bits. Make sure that the compiler is aware of this constraint when accessing 64-bits properties. [0]: https://github.com/devicetree-org/devicetree-specification/blob/master/source/flattened-format.rst Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-27dm: core: Update log method for uclass_find_device_by_seqKever Yang
Use log() insted of debug() for uclass_find_device_by_seq function, since this print is very much and we can filter it out with log() interface. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Move #define to top of file as per docs: Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27dm: regmap: Fix mask in regmap_update_bits()Simon Glass
This function assumes that the 'val' parameter has no masked bits set. This is not defined by the function prototype though. Fix the function to mask the value and update the documentation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-25Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsTom Rini
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs - bmips: various small fixes - mtmips: add new drivers for clock, reset-controller and pinctrl - mtmips: add support for high speed UART - mtmips: update/enhance drivers for SPI and ethernet - mtmips: add support for MMC
2019-10-25Merge branch '2019-10-24-ti-imports'Tom Rini
- Enable DFU on dra7xx boards - Further Keystone 3 platform improvements
2019-10-25ram: k3-j721e: Add support for J721E DDR controllerKevin Scholz
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper logic to integrate these blocks in the device. The DDR subsystem is used to provide an interface to external SDRAM devices which can be utilized for storing program or data. Introduce support for the DDR controller and DDR phy within the DDR subsystem. Signed-off-by: Kevin Scholz <k-scholz@ti.com Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25ram: k3-am654: Do not rely on default values for certain DDR registerJames Doublesin
Added the following registers to the DDR configuration: - ACIOCR0, - ACIOCR3, - V2H_CTL_REG, - DX8SLxDQSCTL. Modified enable_dqs_pd and disable_dqs_pd to only touch the associated bit fields for pullup and pulldown registers (to preserve slew rate and other bits in that same register). Also update the dts files in the same patch to maintain git bisectability. Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25ram: k3-am654: add support for LPDDR4 and DDR3L DDRsJames Doublesin
Added training support for LPDDR4 and DDR3L DDRs. Also added/changed some register configuration to support all 3 DDR types Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- DWC3 improvements - i.MX7 EHCI bugfix
2019-10-25Merge tag 'u-boot-atmel-2020.01-b' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features and fixes for 2020.01 cycle This feature set includes Eugen's work on a new tiny flexcom driver and eeprom mac retrieval for the sam9x60-ek board.
2019-10-25Merge tag 'xilinx-for-v2020.01-part2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.01 part 2 common: - Fix manual relocation for repeatable commands arm: - Also clean up generated dtbos microblaze: - Add support for Manual relocation in crypto framework - Tune and align architecture bootm support zynq: - DT sync ups - Some defconfig updates - Remove empty board_early_init_f() zynqmp: - Clean firmware handing via drivers/firmware/ - DT/defconfig name alignments - DT cleanups with using firmware based clock driver - Some defconfig updates - Add IIO ina226 DT description - Tune zynqmp_psu_init_minimalize.sh script - Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216 versal: - Clean firmware handing via drivers/firmware/ - Add gpio support - Enable DT overlay/USB/CLK/FPGA - DT updates - Tune mini configuration spi: - gqspi - Remove unused headers
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