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2020-08-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning.
2020-08-25watchdog: Add reset support for OcteonTX / TX2Suneel Garapati
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25mmc: Add MMC controller driver for OcteonTX / TX2Suneel Garapati
Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25pci: Add PCI controller driver for OcteonTX / TX2Suneel Garapati
Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Check validity of ofnodeSuneel Garapati
Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati
If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati
Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati
SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati
If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati
Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954xTrommel, Kees (Contractor)
Fix for the case of a U-Boot configuration with CONFIG_SPL, CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because dm_write_i2c does not exist because CONFIG_SPL_DM is not defined. Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com> Cc: Heiko Schocher <hs@denx.de>
2020-08-25i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 supportStefan Roese
This patch fixes a few issues noticed, when testing this new driver on ARM Octeon TX2 again. Here the details: - Remove "common.h" header inclusion - Use correct THP define on Octeon TX2 - Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi" compatible and add a check to the Octeon TX2 specific "cavium,thunderx-i2c" so that the correct driver data is selected. - Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE() as its not needed for the PCI based probing on Octeon TX2 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati
Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese
Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25dm: core: Add API to read PCI bus-range propertyStefan Roese
Add dev_read_pci_bus_range() to read bus-range property values Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25ram: sifive: Fix compiler warnings for 32-bitBin Meng
priv->info.size is of type 'size_t' but the length modifier is l. Fix this by casting priv->info.size. Note 'z' cannot be used as the modifier as SPL does not support that. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-24xen: Code style conformityAnastasiia Lukianenko
Cleaning up the following: ERROR: do not use assignment in if condition #281: FILE: drivers/xen/pvblock.c:260: + if ((err = xenbus_switch_state(XBT_NIL, nodename, CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err" #52: FILE: drivers/xen/pvblock.c:298: + if (err != NULL) { ERROR: do not use assignment in if condition #176: FILE: drivers/xen/gnttab.c:103: + if ((flags = nflags) & (GTF_reading | GTF_writing)) { WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #329: FILE: include/xen/gnttab.h:1: +/* WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead #330: FILE: include/xen/gnttab.h:2: + * SPDX-License-Identifier: GPL-2.0 ERROR: do not use assignment in if condition #630: FILE: lib/sscanf.c:558: + if ((n = inr) < width) { Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24clk: mt7622: add needed clocks for ssusb-nodeFrank Wunderlich
MT7622 needs additional clock definitions to work properly Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24ahci: mediatek: fix copyright and author-linesFrank Wunderlich
after review of sam copyright should be on one line and link should not between author lines just remove the link and put ryder first as he is author of linux-driver Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24reset: drop unnecessary comment for pciesysFrank Wunderlich
after review from sam this comment should be removed Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24phy: mtk-tphy: make shared reg optional for v1Frank Wunderlich
make the shared reg optional when version is v1 for sata Suggested-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24virtio_blk: set log2blksz correctlyAKASHI Takahiro
'log2blksz' in blk_desc structure must always be initialized, otherwise it will cause a lot of weird failures in file operations. For example, fs_set_blk_dev[_with_part]() examines a block device against every file system with its probe function. In particular, ext4 file system's ext4_probe() will calls fs_devread() to fetch a super block. If log2blksz is 0, the actual 'read' size, i.e. block_len >> log2blksz, is much bigger than a buffer's size, and it can end up with memory corruption. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Fixes: f4802209e59d ("virtio: Add block driver support") Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-24firmware: psci: Do not bind driver if U-Boot runs in EL3Michal Simek
There is no reason to bind psci driver if U-Boot runs in EL3 because SMC/HVC instructions can't be called. That's why detect this state and don't let user to crash from prompt by performing reset or poweroff commands (if enabled). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-24Merge tag 'u-boot-clk-24Aug2020' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-clk - Add CCF clocks definitions for iMX6Q enet (ETH) - Several fixes for CCF framework - the most notable is the one, which adds get_rate helper to clk-mux.c - Improvements for clk command - better visibility and alignment.
2020-08-24clk: ccf: Add missing #include <dm/uclass.h> to clk-mux.cLukasz Majewski
After adding custom get_rate helper function it was necessary to include <dm/uclass.h> to avoid warnings about missing uclass_get_device_by_name. Signed-off-by: Lukasz Majewski <lukma@denx.de> Series-to: u-boot
2020-08-24clk: ccf: mux: change the get_rate helperDario Binacchi
The previous version of the get_rate helper does not work if the mux clock parent is changed after the probe. This error has not been detected because this condition has not been tested. The error occurs because the set_parent helper does not change the parent of the clock device but only the clock selection register. Since changing the parent of a probed device can be tricky, the new version of the get_rate helper provides the rate of the selected clock and not that of the parent. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: ccf: mux: fix access to the sandbox registerDario Binacchi
The tests developed for the mux clock are run on the sandbox. They don't call the clk_mux_set_parent routine and therefore they do not detect this error. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: ccf: mux: fix typoDario Binacchi
Close the opening bracket. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: ccf: mux: change include orderDario Binacchi
Apply u-boot coding style on include files order. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: fix the console output of clk_registerDario Binacchi
The parent->name variable can be used only in case the uclass_get_device_by_name routine returns successfully. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: set flags in the ccf registration routinesDario Binacchi
The top-level framework flags are passed as parameter to the common clock framework (ccf) registration routines without being used. Checks of the flags setting added by the patch have been added in the ccf test. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24dm: test: clk: add the test for the ccf gated clockDario Binacchi
Unlike the other clock types, in the case of the gated clock, a new driver has been developed which does not use the registering routine provided by the common clock framework. The addition of the ecspi0 clock to sandbox therefore allows testing the ccf gate clock. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clockLukasz Majewski
After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all NXP boards, which are not IMX8 and in the same time are supporting CCF need to provide PTP clock. On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux kernel's CCF. Code in this change models the simplest case when enet reference clock is generated from 'osc' clock. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24clk: imx: Add support for pllv3 enet clockLukasz Majewski
This code has been ported from Linux kernel v5.5.5 (tag) and has been adjusted to U-Boot's DM. It adds support for correct recognition of IMX_PLLV3_ENET flag in the clk-pllv3.c driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24clk: imx6: Add definition for IMX6QDL_CLK_ENET clockLukasz Majewski
After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all NXP boards, which are not IMX8 and in the same time are supporting CCF need to provide IMX6QDL_CLK_ENET. This change defines the missing clock in i.MX6Q's CCF. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24clk: ICS8N3QV01 remove superfluous codeHeinrich Schuchardt
Do not calculate a unused value of n which is overwritten in both branches of the subsequent if statement. Identified by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-08-23Merge tag 'dm-pull-22aug20' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm replace devfdt_get_addr_ptr() with dev_read_addr_ptr() binman fixes for portage various minor fixes 'bind' command improvements
2020-08-23Convert CONFIG_SPLASH_SCREEN et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_SPLASH_SCREEN CONFIG_SPLASH_SCREEN_ALIGN CONFIG_SPLASHIMAGE_GUARD CONFIG_SPLASH_SOURCE Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-22treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()Masahiro Yamada
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To help this tedious work, this commit converts devfdt_get_addr_ptr() to dev_read_addr_ptr() by coccinelle. I also removed redundant casts because dev_read_addr_ptr() returns an opaque pointer. To generate this commit, I ran the following semantic patch excluding include/dm/. <smpl> @@ type T; expression dev; @@ -(T *)devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) @@ expression dev; @@ -devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22ata: mvebu: use dev_read_addr() to get base addressMasahiro Yamada
It is strange to use devfdt_get_addr_ptr(), then cast the pointer back to ulong because you could use devfdt_get_addr() without casting. Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-22gpio: at91: use dev_read_addr() to get base addressMasahiro Yamada
It is strange to use devfdt_get_addr_ptr(), then cast the pointer back to uint32 because you could use devfdt_get_addr() without casting. Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22dm: core: Fix devfdt_get_addr_ptr return valueOvidiu Panait
According to the description of devfdt_get_addr_ptr, this function should return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE. Fix this by making devfdt_get_addr_ptr return NULL on failure, as described in the function comments. Also, update the drivers currently checking (void *)FDT_ADDR_T_NONE to check for NULL. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22sandbox: phy: add driver_data for bind test cmdPatrice Chotard
Add driver data to existing compatible string "sandbox,phy". Add an additional compatible string without driver_data This will verify that bind command parses, finds and passes the correct driver data to device_bind_with_driver_data() by using driver_data in the second sandbox_phy_ids table entry. In sandbox_phy_bind() a check is added to validate driver_data content. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22dm: fix ofnode_read_addr/size_cells()Heinrich Schuchardt
In the case of the live tree ofnode_read_addr_cells() and ofnode_read_size_cells() return the #address-cells and #size-cells defined in the parent node. With the patch the same is done for a non-live tree. The only consumer of these functions is currently the CFI flash driver. This patch fixes the incorrect parsing of the device tree leading to 'saveenv' failing on qemu_arm64_defconfig. For testing qemu-system-aarch64 has to be called with -drive if=pflash,format=raw,index=1,file=envstore.img to provide the flash memory. envstore.img must be 64 MiB large. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-20Merge tag 'xilinx-for-v2020.10-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2020.10-rc3 - Fix fdtfile variable setup - Fix bootm_*/fdt_high/initrd_high variables handling - Fix Kconfig dependencies for Xilinx drivers - Fix booting u-boot from lowest memory - Fix firmware payload argument count for Versal - Fix dfu configurations - Fix mio_bank property handling - Fix and align code around ID detection - Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG - Simplify logic around reading MAC from eeprom - Decrease malloc length for zynqmp mini qspi - Enable preboot for ZynqMP and Versal i2c: - Fix i2c eeprom partitions handling mmc: - Fix logic around HS mode enabling and use proper functions
2020-08-20clk: versal: Move pm_query_id out of clock driverMichal Simek
There is no reason to have firmware specific structure in clock driver. Move it to generic location and also initialize enum values which is based on https://lore.kernel.org/linux-arm-kernel/20200318125003.GA2727094@kroah.com/ recommended way to go to make sure that values guaranteed by compiler. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20mmc: sdhci: Use upper/lower_32_bits macrosMichal Simek
Instead of recasting and shifting use macros which are designed for taking upper/lower 32bit value from 64bit variable. Signed-off-by: Michal Simek <michal.simek@xilinx.com>