summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2019-02-16Merge tag 'video-for-2019.04-rc2' of git://git.denx.de/u-boot-videoTom Rini
- sunxi display DDC probe fallback - support 24bpp BMP files on 16bpp displays
2019-02-16Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Various MMC fixes
2019-02-16mmc: tmio: sdhi: Configure DT2FF register for HS400 modeMarek Vasut
The DT2FF register must be configured differently for HS400 mode and for HS200/SDR104 mode. Configure the DT2FF register according to the recommended datasheet settings for each mode. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-16mmc: tmio: Configure HOST_MODE WMODE according to bus widthMarek Vasut
Set the HOST_MODE register WMODE bit according to the SDHI bus width, that is 0 for 64bit bus and 1 for 16/32bit bus. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-16mmc: Downgrade SD/MMC from UHS/HS200/HS400 modes before bootMarek Vasut
Older kernel versions or systems which do not connect eMMC reset line properly may not be able to handle situations where either the eMMC is left in HS200/HS400 mode or SD card in UHS modes by the bootloader and may misbehave. Downgrade the eMMC to HS/HS52 mode and/or SD card to non-UHS mode before booting the kernel to allow such older kernels to work with modern U-Boot. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2019-02-16Merge tag 'u-boot-imx-2019-02-16' of git://git.denx.de/u-boot-imxTom Rini
u-boot-imx-2019-02-16 --------------------- - vhybrid: add calibration - gw_ventana: fixes - Improve documentation for Secure Boot (HABv4) - Fix Marvell Switch - MX6 Sabre, switch to DM - Fixes for NAND
2019-02-15imx: serial_mxc: disable ri and dcd irq in dte modeMax Krummenacher
If the UART is used in DTE mode the RI and DCD bits in UCR3 become irq enable bits. Both are set to enabled after reset and both likely are pending. Disable the bits to prevent an interrupt storm when Linux enables the UART interrupts. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-02-15mmc: fsl_esdhc: Fix DM_REGULATOR ifdefs for SPL buildsAbel Vesa
Since the fsl_esdhc will also be used by SPL, make the preprocessor switches more generic to allow any kind of build. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-02-15usb: ehci-mx6: Make regulator DM_REGULATOR dependentAbel Vesa
Do the regulator related work only if the build has the DM_REGULATOR. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-02-15video: bmp: Add support for 24bpp BMP files on 16bpp displaysStefan Roese
This patch adds support to load 24bpp BMP files on 16bpp displays. This will be used by the theadorable board. The "old" bmp command did support this operartion mode and to not break compatibility with the move to DM_VIDEO, we need to add this support to the "new" bmp code. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
2019-02-15sunxi: display: Implement fallback to ddc probe when hpd failsPriit Laes
There are HDMI displays where hpd pin is not connected, thus we cannot get it to work unless we specifically set the resolution. Rework the display probing, so hotplug detect failure causes fallback to probing ddc for EDID data. Signed-off-by: Priit Laes <priit.laes@paf.com>
2019-02-15sunxi: display: Move DDC PLL setup to HDMI initPriit Laes
Move PLL initialization code to single place so we won't call it every time we query for EDID data. Signed-off-by: Priit Laes <priit.laes@paf.com>
2019-02-15net: mv88e61xx: fix autonegotiation on portsTim Harvey
phy_reset should be called before autoneg is setup The only boards using MV88E61XX_SWITCH are: - alliedtelesis/SBx81LIFKW - alliedtelesis/SBx81LIFXCAT - gateworks/gw_ventana Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
2019-02-15MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPLAdam Ford
The initialization of the NAND in SPL hard-coded ecc.bytes, ecc.size, and ecc.strength which may work for some NAND parts, but it not appropriate for others. With the pending patch "mxs_nand: Fix BCH read timeout error on boards requiring ECC" the driver can auto configure the ECC when these entries are blank. This patch has been tested in NAND flash with oob 64 and oob 128. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com>
2019-02-15net: dm: fec: Fix regulator enable when using DM_REGULATORAdam Ford
When DM_REGULATOR is enabled, the driver attempts to call regulator_autoset() which expects the regulators to be on at boot and/or always on and fails if they are not true. For a more generic approach, this patch just calls regulator_set_enable() which shouldn't have such restrictions. Fixes: ad8c43cbcafb ("net: dm: fec: Support the phy-supply binding") Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-02-15MTD: NAND: mxs_nand_init_dma: Make mxs_nand_init_dma staticAdam Ford
mxs_nand_init_dma is only referenced from mxs_nand.c. It's not referenced in any headers or outside code, so this patch defines it as static. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-15MTD: mxs_nand: Fix BCH read timeout error on boards requiring ECCAdam Ford
The LogicPD board uses a Micron Flash with ECC. To boot this from SPL, the ECC needs to be correctly configured or the BCH engine times out. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com>
2019-02-14xilinx: common: Remove !DM_i2C code for reading mac from eepromMichal Simek
All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14i2c: Remove ancient zynq_i2c driverMichal Simek
This driver is replaced by drivers/i2c/i2c-cdns.c DM based driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Heiko Schocher <hs@denx.de>
2019-02-14spi: zynqmp_gqspi: Enable versal compatible stringMichal Simek
Trivial patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-12x86: tsc: Add support for native calibration of TSC freqBernhard Messerklinger
Add native tsc calibration function. Calibrate the tsc timer the same way as linux does in arch/x86/kernel/tsc.c. Fixes booting for Apollo Lake processors. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-11Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
- DM I2C improvements
2019-02-11pcie: designware: mvebu: fix reset release polarityBaruch Siach
The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted), while reset inactive value is 0 (de-asserted). Fix the reset toggle code to set the correct reset logic value. Reported-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-02-11i2c: mux: Generate longer i2c mux nameMichal Simek
For !DM case busses are listed as ZynqMP> i2c bus Bus 0: zynq_0 Bus 1: zynq_0->PCA9544A@0x75:0 Bus 2: zynq_0->PCA9544A@0x75:1 Bus 3: zynq_0->PCA9544A@0x75:2 Bus 4: zynq_1 Bus 5: zynq_1->PCA9548@0x74:0 Bus 6: zynq_1->PCA9548@0x74:1 Bus 7: zynq_1->PCA9548@0x74:2 Bus 8: zynq_1->PCA9548@0x74:3 Bus 9: zynq_1->PCA9548@0x74:4 Bus 10: zynq_1->PCA9548@0x75:0 Bus 11: zynq_1->PCA9548@0x75:1 Bus 12: zynq_1->PCA9548@0x75:2 Bus 13: zynq_1->PCA9548@0x75:3 Bus 14: zynq_1->PCA9548@0x75:4 Bus 15: zynq_1->PCA9548@0x75:5 Bus 16: zynq_1->PCA9548@0x75:6 Bus 17: zynq_1->PCA9548@0x75:7 where is exactly describing i2c bus topology. By moving to DM case i2c mux buses are using names from DT and because i2c-muxes describing sub busses with the same names like i2c@0, etc it is hard to identify which bus is where. Linux is adding topology information to i2c-mux busses to identify them better. This patch is doing the same and composing bus name with topology information. When patch is applied with topology information on zcu102-revA. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@ff020000->i2c-mux@75->i2c@0 Bus 3: i2c@ff020000->i2c-mux@75->i2c@1 Bus 4: i2c@ff020000->i2c-mux@75->i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@ff030000->i2c-mux@74->i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@ff030000->i2c-mux@74->i2c@1 Bus 7: i2c@ff030000->i2c-mux@74->i2c@2 Bus 8: i2c@ff030000->i2c-mux@74->i2c@3 Bus 9: i2c@ff030000->i2c-mux@74->i2c@4 Bus 10: i2c@ff030000->i2c-mux@75->i2c@0 Bus 11: i2c@ff030000->i2c-mux@75->i2c@1 Bus 12: i2c@ff030000->i2c-mux@75->i2c@2 Bus 13: i2c@ff030000->i2c-mux@75->i2c@3 Bus 14: i2c@ff030000->i2c-mux@75->i2c@4 Bus 15: i2c@ff030000->i2c-mux@75->i2c@5 Bus 16: i2c@ff030000->i2c-mux@75->i2c@6 Bus 17: i2c@ff030000->i2c-mux@75->i2c@7 Behavior before the patch is applied. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@0 Bus 3: i2c@1 Bus 4: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@1 Bus 7: i2c@2 Bus 8: i2c@3 Bus 9: i2c@4 Bus 10: i2c@0 Bus 11: i2c@1 Bus 12: i2c@2 Bus 13: i2c@3 Bus 14: i2c@4 Bus 15: i2c@5 Bus 16: i2c@6 Bus 17: i2c@7 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-11i2c: Fill req_seq in i2c_post_bind()Michal Simek
For i2c controllers which are missing alias in DT there is no req_seq setup. This function is setting up proper ID based on highest found alias ID. On zcu102 this is the behavior when patch is applied. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@0 Bus 3: i2c@1 Bus 4: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@1 Bus 7: i2c@2 Bus 8: i2c@3 Bus 9: i2c@4 Bus 10: i2c@0 Bus 11: i2c@1 Bus 12: i2c@2 Bus 13: i2c@3 Bus 14: i2c@4 Bus 15: i2c@5 Bus 16: i2c@6 Bus 17: i2c@7 Before this patch applied (controllers have -1 ID) ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus -1: i2c@0 Bus -1: i2c@1 Bus -1: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus -1: i2c@0 (active 0) 54: eeprom@54, offset len 1, flags 0 Bus -1: i2c@1 Bus -1: i2c@2 Bus -1: i2c@3 Bus -1: i2c@4 Bus -1: i2c@0 Bus -1: i2c@1 Bus -1: i2c@2 Bus -1: i2c@3 Bus -1: i2c@4 Bus -1: i2c@5 Bus -1: i2c@6 Bus -1: i2c@7 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-11i2c: dm: Record maximum id of devices before probing devicesMichal Simek
There is a need to find out the first free i2c ID which can be used for i2s buses (including i2c buses connected to i2c mux). Do it early in init and share this variable with other i2c classes for uniq bus identification. add from hs: fix build problem in i2c-uclass.c for omap devices Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-10Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- SD/MMC fixes and ext4 memory leak fix
2019-02-10Merge tag 'dm-pull-10feb19' of git://git.denx.de/u-boot-dmTom Rini
Samsung sound patches (applied for Samsung maintainer) Common sound support buildman environment support of-platdata documentation improvements
2019-02-09sound: Allow audio codecs to be used by other SoCsSimon Glass
At present there is still some samsung-specific code in the audio codecs. Remove it so that these can be used by other SoCs. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-02-09sound: samsung: Fix 'regiter' typoSimon Glass
Fix a typo that appears many times in this file. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-02-09misc: Allow child devicesSimon Glass
Allow misc devices to have children, so that we can use this uclass for cases where a child device (e.g. I2S) needs to access a misc driver for transferring data. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-02-09mmc: omap_hsmmc: Use regulator_set_enable_if_allowed for enabling regulatorLokesh Vutla
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable() while enabling io regulators. This way the driver doesn't see an error when disabling an always-on regulator and when enabling is not supported. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-02-09power: regulator: Introduce regulator_set_enable_if_allowed apiLokesh Vutla
regulator_set_enable() api throws an error in the following three cases: - when requested to disable an always-on regulator - when set_enable() ops not provided by regulator driver - when enabling is actually failed.(Error returned by the regulator driver) Sometimes consumer drivers doesn't want to track the first two scenarios and just need to worry about the case where enabling is actually failed. But it is also a good practice to have an error value returned in the first two cases. So introduce an api regulator_set_enable_if_allowed() which ignores the first two error cases and returns an error as given by regulator driver. Consumer drivers can use this api need not worry about the first two error conditions. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-09Revert "power: regulator: Return success on attempt to disable an always-on ↵Lokesh Vutla
regulator" This reverts commit e17e0ceb83538c015a50b965547f2f4d38f81c5d. It is advised to return an error when trying to disable an always-on regulator and let the consumer driver handle the error if needed. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-02-09samsung: mmc: Drop old MMC init codeSimon Glass
Now that these boards use driver model we can drop the old code. At present s5p_mmc_init() is still used by goni and smdkv310 so cannot be removed unless we remove those boards. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2019-02-09sound: Add a driver for max98088Simon Glass
This chip is used by spring. Add a driver for it and update the samsung_sound driver to pick it up. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-02-09dm: device: fail uclass_find_first_device() if list_emptyMarcel Ziswiler
While uclass_find_device() fails with -ENODEV in case of list_empty strangely uclass_find_first_device() returns 0. Fix uclass_find_first_device() to also fail with -ENODEV instead. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-09watchdog: bcm6345: allow to use this driver on arm bcm63158Philippe Reynes
This IP is also used on some arm SoC, so we allow to use it on arm bcm63158 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09mmc: omap_hsmmc: Workaround errata regarding SDR104/HS200 tuning failures (i929)Faiz Abbas
Errata i929 in certain OMAP5/DRA7XX/AM57XX silicon revisions (SPRZ426D - November 2014 - Revised February 2018 [1]) mentions unexpected tuning pattern errors. A small failure band may be present in the tuning range which may be missed by the current algorithm. Furthermore, the failure bands vary with temperature leading to different optimum tuning values for different temperatures. As suggested in the related Application Report (SPRACA9B - October 2017 - Revised July 2018 [2]), tuning should be done in two stages. In stage 1, assign the optimum ratio in the maximum pass window for the current temperature. In stage 2, if the chosen value is close to the small failure band, move away from it in the appropriate direction. References: [1] http://www.ti.com/lit/pdf/sprz426 [2] http://www.ti.com/lit/pdf/SPRACA9 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-02-09clk: stm32mp1: correctly handle Clock Spreading GeneratorPatrick Delaunay
To activate the csg option, the driver need to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator of PLLn enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09clk: stm32mp1: add debug informationPatrick Delaunay
Add support of clk dump command and display information during probe (under CONFIG_DISPLAY_CPUINFO). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09clk: stm32mp1: recalculate counter when switching freqPatrick Delaunay
Because stgen is initialized with HSI clock, we need to recalculate the counter when changing frequency. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRRPatrick Delaunay
Remove unnecessary setbits on set/clear registers. Avoid to deactivate HSI with HSE. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09clk: stm32mp1: add IPCC clockPatrick Delaunay
Add support for enable/disable of IPCC clock using AHB3 registers Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09clk: stm32mp1: no more get ck_usbo_48m in device treePatrick Delaunay
Remove support of ck_usbo_48m clock node in device tree, but force 48MHz frequency to prepare alignment with kernel device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09drivers: serial: dm: Enable DM_FLAG_PRE_RELOC in SBSA pl011 uart driverVabhav Sharma
The DM_FLAG_PRE_RELOC shall be enabled in SBSA PL011 uart driver as this driver is used in NXP based SoCs It is necessary to have Serial console running before relocation The !CONFIG_IS_ENABLED(OF_CONTROL) [*] check is set as "workaround" for DM problem : 4687919684e This flag is set if board does not support device-tree and using platform data, In DM Model either of device tree or platform data can be used to fetch device configuration It is possible to use SBSA UART with CONFIG_DM_SERIAL but witout corresponding device tree description (OF_CONTROL) Other board/SoCs have this flag set unconditionally Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
2019-02-09watchdog: bcm6345: allow to use this driver on arm bcm6858Philippe Reynes
This IP is also used on some arm SoC, so we allow to use it on arm bcm6858 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09watchdog: bcm6345: switch to raw I/O functionsPhilippe Reynes
This driver is used on several big endian mips board. So we could use raw I/O function instead of forcing big endian access. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-02-09mmc: Do not poll using CMD13 when changing timingMarek Vasut
When using CMD6 to switch eMMC card timing from HS200/HS400 to HS/legacy, do not poll for the completion status using CMD13, but rather wait 50mS. Once the card receives the CMD6 and starts executing it, the bus is in undefined state until both the card finishes executing the command and until the controller switches the bus to matching timing configuration. During this time, it is not possible to transport any commands or data across the bus, which includes the CMD13. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-02-09mmc: tmio: renesas: Add 1uS delay after DMA completion on older IPsMarek Vasut
The internal DMAC asserts DMA transfer end bit too early on older version of the TMIO IPs which use bit 17 for DTRAEND. Add 1uS delay after the completion of DMA transfer and before invalidating the cache to let the DMAC fully complete the transfer. Otherwise, it could happen that the last few bytes of a transferred data are not available. A test case to trigger this behavior is the following command, ran on the U-Boot command line, with Sandisk 16 GiB UHS-I card inserted into SDHI slot 0 and with first partition being of type FAT: => while true ; do mmc rescan ; fstype mmc 0:1 ; done Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit (git 2.34.1) at 2025-01-02 16:24:37 +0000