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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
*
* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
*
* Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
*/
/dts-v1/;
#include "sama5d27_wlsom1.dtsi"
/ {
model = "Microchip SAMA5D27 WLSOM1 EK";
compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d2", "atmel,sama5";
chosen {
stdout-path = &uart0;
};
onewire_tm: onewire {
gpios = <&pioA PIN_PC9 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_onewire_tm_default>;
status = "okay";
w1_eeprom: w1_eeprom@0 {
compatible = "maxim,ds24b33";
status = "okay";
};
};
ahb {
sdmmc0: sdio-host@a0000000 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
status = "okay";
};
apb {
qspi1: spi@f0024000 {
status = "okay";
};
macb0: ethernet@f8008000 {
status = "okay";
};
uart0: serial@f801c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
status = "okay";
};
pioA: gpio@fc038000 {
pinctrl {
pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
<PIN_PA3__SDMMC0_DAT1>,
<PIN_PA4__SDMMC0_DAT2>,
<PIN_PA5__SDMMC0_DAT3>;
bias-disable;
};
pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA12__SDMMC0_WP>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
pinctrl_uart0_default: uart0_default {
pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>;
bias-disable;
};
pinctrl_onewire_tm_default: onewire_tm_default {
pinmux = <PIN_PC9__GPIO>;
bias-pull-up;
};
};
};
};
};
};
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