summaryrefslogtreecommitdiff
path: root/arch/arm/dts/fsl-ls2080a-qds.dts
blob: 13461b5c4580782e77b07aa0a37ed09fc2cb0c85 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
 * Freescale ls2080a QDS board device tree source
 *
 * Copyright 2013-2015 Freescale Semiconductor, Inc.
 */

/dts-v1/;

#include "fsl-ls2080a.dtsi"

/ {
	model = "Freescale Layerscape 2080a QDS Board";
	compatible = "fsl,ls2080a-qds", "fsl,ls2080a";

	aliases {
		spi0 = &qspi;
		spi1 = &dspi;
	};
};

&i2c0 {
	status = "okay";
	pca9547@77 {
		compatible = "nxp,pca9547";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00>;
			rtc@68 {
				compatible = "dallas,ds3232";
				reg = <0x68>;
			};
		};
	};
};

&dspi {
	bus-num = <0>;
	status = "okay";

	dflash0: n25q128a {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <3000000>;
		spi-cpol;
		spi-cpha;
		reg = <0>;
	};
	dflash1: sst25wf040b {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <3000000>;
		spi-cpol;
		spi-cpha;
		reg = <1>;
	};
	dflash2: en25s64 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <3000000>;
		spi-cpol;
		spi-cpha;
		reg = <2>;
	};
};

&qspi {
	bus-num = <0>;
	status = "okay";

	qflash0: s25fs256s@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&sata {
	status = "okay";
};