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|
/*
* Copyright 2018 Logic PD
* This file is adapted from imx6qdl-sabresd.dtsi.
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x10000000 0x80000000>;
};
reg_wl18xx_vmmc: regulator-wl18xx {
compatible = "regulator-fixed";
regulator-name = "vwl1837";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;
startup-delay-us = <70000>;
enable-active-high;
};
};
/* Reroute power feeding the CPU to come from the external PMIC */
®_arm
{
vin-supply = <&sw1a_reg>;
};
®_soc
{
vin-supply = <&sw1c_reg>;
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
status = "okay";
nand-on-flash-bbt;
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
pmic: pfuze100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1450000>;
regulator-name = "vddcore";
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1450000>;
regulator-name = "vddsoc";
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "gen_3v3";
regulator-boot-on;
/* regulator-always-on; */
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-name = "sw3a_vddr";
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-name = "sw3b_vddr";
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "gen_rgmii";
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
regulator-name = "gen_5v0";
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "gen_vsns";
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "gen_1v5";
};
vgen2_reg: vgen2 {
regulator-name = "vgen2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vgen3 {
regulator-name = "gen_vadj_0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
vgen4_reg: vgen4 {
regulator-name = "gen_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-name = "gen_adj_1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-name = "gen_2v5";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
coin_reg: coin {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
};
};
temp_sense0: tmp102@4a {
compatible = "ti,tmp102";
reg = <0x4a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tempsense>;
interrupt-parent = <&gpio6>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
#thermal-sensor-cells = <1>;
};
temp_sense1: tmp102@49 {
compatible = "ti,tmp102";
reg = <0x49>;
interrupt-parent = <&gpio6>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
#thermal-sensor-cells = <1>;
};
mfg_eeprom: at24@51 {
compatible = "atmel,24c64";
pagesize = <32>;
read-only;
reg = <0x51>;
};
user_eeprom: at24@52 {
compatible = "atmel,24c64";
pagesize = <32>;
reg = <0x52>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0
MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0
MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0
MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0
MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0
MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0
MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0
MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0
MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0
MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0
MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0
MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0
MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0
MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0
MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0
MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */
>;
};
pinctrl_tempsense: tempsensegrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Temp Sense Alert */
>;
};
};
&snvs_poweroff {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
uart-has-rtscts;
bluetooth {
compatible = "ti,wl1837-st";
enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
};
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
non-removable;
keep-power-in-suspend;
enable-sdio-wakeup;
status = "okay";
vmmc-supply = <&sw2_reg>;
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
wakeup-source;
vmmc-supply = <®_wl18xx_vmmc>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
tcxo-clock-frequency = <26000000>;
};
};
|
