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/*
* Copyright (C) 2015 Amarula Solutions B.V.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
/ {
aliases {
mmc1 = &usdhc3;
mmc2 = &usdhc4;
};
memory {
reg = <0x10000000 0x80000000>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-handle = <ð_phy>;
phy-mode = "rgmii";
status = "okay";
mdio {
eth_phy: ethernet-phy {
rxc-skew-ps = <1140>;
txc-skew-ps = <1140>;
txen-skew-ps = <600>;
rxdv-skew-ps = <240>;
rxd0-skew-ps = <420>;
rxd1-skew-ps = <600>;
rxd2-skew-ps = <420>;
rxd3-skew-ps = <240>;
txd0-skew-ps = <60>;
txd1-skew-ps = <60>;
txd2-skew-ps = <60>;
txd3-skew-ps = <240>;
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usdhc3 {
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
no-1-8-v;
status = "okay";
};
&usdhc4 {
u-boot,dm-spl;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
bus-witdh = <8>;
no-1-8-v;
non-removable;
status = "okay";
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
>;
};
pinctrl_usdhc4: usdhc4grp {
u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
>;
};
pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
>;
};
pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
>;
};
};
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