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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/dma/k3-udma.h>
/ {
chosen {
stdout-path = "serial2:115200n8";
};
aliases {
serial2 = &main_uart0;
};
};
&cbass_main{
u-boot,dm-spl;
main_pmx0: pinmux@11c000 {
compatible = "pinctrl-single";
reg = <0x0 0x11c000 0x0 0x2e4>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
main_pmx1: pinmux@11c2e8 {
compatible = "pinctrl-single";
reg = <0x0 0x11c2e8 0x0 0x24>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
sdhci0: sdhci@04F80000 {
compatible = "arasan,sdhci-5.1";
reg = <0x0 0x4F80000 0x0 0x1000>,
<0x0 0x4F90000 0x0 0x400>;
clocks = <&k3_clks 47 1>;
power-domains = <&k3_pds 47>;
max-frequency = <25000000>;
};
sdhci1: sdhci@04FA0000 {
compatible = "arasan,sdhci-5.1";
reg = <0x0 0x4FA0000 0x0 0x1000>,
<0x0 0x4FB0000 0x0 0x400>;
clocks = <&k3_clks 48 1>;
power-domains = <&k3_pds 48>;
max-frequency = <25000000>;
};
};
&cbass_mcu {
u-boot,dm-spl;
wkup_pmx0: pinmux@4301c000 {
compatible = "pinctrl-single";
reg = <0x0 0x4301c000 0x0 0x118>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
navss_mcu: navss-mcu {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
ti,sci-dev-id = <119>;
mcu_ringacc: ringacc@2b800000 {
compatible = "ti,am654-navss-ringacc";
reg = <0x0 0x2b800000 0x0 0x400000>,
<0x0 0x2b000000 0x0 0x400000>,
<0x0 0x28590000 0x0 0x100>,
<0x0 0x2a500000 0x0 0x40000>;
reg-names = "rt", "fifos",
"proxy_gcfg", "proxy_target";
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
ti,dma-ring-reset-quirk;
ti,sci = <&dmsc>;
ti,sci-dev-id = <195>;
};
mcu_udmap: udmap@285c0000 {
compatible = "ti,k3-navss-udmap";
reg = <0x0 0x285c0000 0x0 0x100>,
<0x0 0x2a800000 0x0 0x40000>,
<0x0 0x2aa00000 0x0 0x40000>;
reg-names = "gcfg", "rchanrt", "tchanrt";
#dma-cells = <3>;
ti,ringacc = <&mcu_ringacc>;
ti,psil-base = <0x6000>;
ti,sci = <&dmsc>;
ti,sci-dev-id = <194>;
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
<0x2>; /* TX_CHAN */
ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
<0x4>; /* RX_CHAN */
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
dma-coherent;
};
};
};
&cbass_wakeup {
u-boot,dm-spl;
};
&secure_proxy_main {
u-boot,dm-spl;
};
&dmsc {
u-boot,dm-spl;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
u-boot,dm-spl;
};
};
&k3_pds {
u-boot,dm-spl;
};
&k3_clks {
u-boot,dm-spl;
};
&k3_reset {
u-boot,dm-spl;
};
&main_pmx0 {
u-boot,dm-spl;
main_uart0_pins_default: main_uart0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
>;
u-boot,dm-spl;
};
main_mmc0_pins_default: main_mmc0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
>;
u-boot,dm-spl;
};
main_mmc1_pins_default: main_mmc1_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
>;
u-boot,dm-spl;
};
};
&main_pmx1 {
u-boot,dm-spl;
};
&main_uart0 {
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
status = "okay";
};
&sdhci0 {
u-boot,dm-spl;
status = "okay";
non-removable;
bus-width = <8>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
};
&sdhci1 {
u-boot,dm-spl;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
sdhci-caps-mask = <0x7 0x0>;
};
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