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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/ {
soc {
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac", "snps,dwmac-3.710",
"snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>;
clock-names = "stmmaceth", "clkin0", "clkin1";
status = "disabled";
mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
};
};
sd_emmc_a: sd@ffe03000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0xffe03000 0x0 0x800>;
interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_A>,
<&clkc CLKID_SD_EMMC_A_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_A>;
};
sd_emmc_b: sd@ffe05000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0xffe05000 0x0 0x800>;
interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_B>;
};
sd_emmc_c: mmc@ffe07000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0xffe07000 0x0 0x800>;
interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
};
};
};
&periphs_pinctrl {
emmc_pins: emmc {
mux {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3",
"emmc_nand_d4",
"emmc_nand_d5",
"emmc_nand_d6",
"emmc_nand_d7",
"emmc_clk",
"emmc_cmd";
function = "emmc";
bias-pull-up;
};
};
emmc_ds_pins: emmc-ds {
mux {
groups = "emmc_nand_ds";
function = "emmc";
bias-pull-down;
};
};
emmc_clk_gate_pins: emmc_clk_gate {
mux {
groups = "BOOT_8";
function = "gpio_periphs";
bias-pull-down;
};
};
eth_leds_pins: eth-leds {
mux {
groups = "eth_link_led",
"eth_act_led";
function = "eth";
bias-disable;
};
};
eth_rmii_pins: eth-rmii {
mux {
groups = "eth_mdio",
"eth_mdc",
"eth_rgmii_rx_clk",
"eth_rx_dv",
"eth_rxd0",
"eth_rxd1",
"eth_txen",
"eth_txd0",
"eth_txd1";
function = "eth";
bias-disable;
};
};
eth_rgmii_pins: eth-rgmii {
mux {
groups = "eth_rxd2_rgmii",
"eth_rxd3_rgmii",
"eth_rgmii_tx_clk",
"eth_txd2_rgmii",
"eth_txd3_rgmii";
function = "eth";
bias-disable;
};
};
sdcard_c_pins: sdcard_c {
mux {
groups = "sdcard_d0_c",
"sdcard_d1_c",
"sdcard_d2_c",
"sdcard_d3_c",
"sdcard_cmd_c",
"sdcard_clk_c";
function = "sdcard";
bias-pull-up;
};
};
sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
mux {
groups = "GPIOC_4";
function = "gpio_periphs";
bias-pull-down;
};
};
sdcard_z_pins: sdcard_z {
mux {
groups = "sdcard_d0_z",
"sdcard_d1_z",
"sdcard_d2_z",
"sdcard_d3_z",
"sdcard_cmd_z",
"sdcard_clk_z";
function = "sdcard";
bias-pull-up;
};
};
sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
mux {
groups = "GPIOZ_6";
function = "gpio_periphs";
bias-pull-down;
};
};
};
&periphs {
eth_phy: mdio-multiplexer@4c000 {
compatible = "amlogic,g12a-mdio-mux";
reg = <0x0 0x4c000 0x0 0xa4>;
clocks = <&clkc CLKID_ETH_PHY>,
<&xtal>,
<&clkc CLKID_MPLL_5OM>;
clock-names = "pclk", "clkin0", "clkin1";
mdio-parent-bus = <&mdio0>;
#address-cells = <1>;
#size-cells = <0>;
ext_mdio: mdio@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
int_mdio: mdio@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
internal_ephy: ethernet_phy@8 {
compatible = "ethernet-phy-id0180.3300",
"ethernet-phy-ieee802.3-c22";
reg = <8>;
max-speed = <100>;
/* FIXME: Add irq support */
};
};
};
};
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