arch/arm/dts/mt7629-rfb.dts


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97

/*
 * Copyright (C) 2018 MediaTek Inc.
 * Author: Ryder Lee <ryder.lee@mediatek.com>
 *
 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
 */

/dts-v1/;
#include "mt7629.dtsi"
#include "mt7629-rfb-u-boot.dtsi"

/ {
	model = "MediaTek MT7629 RFB";
	compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";

	aliases {
		spi0 = &snfi;
	};

	chosen {
		stdout-path = &uart0;
	};
};

&eth {
	status = "okay";
	mediatek,gmac-id = <1>;
	phy-mode = "gmii";
	phy-handle = <&phy0>;

	phy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&pinctrl {
	snfi_pins: snfi-pins {
		mux {
			function = "flash";
			groups = "snfi";
		};
	};

	snor_pins: snor-pins {
		mux {
			function = "flash";
			groups = "spi_nor";
		};
	};

	uart0_pins: uart0-default {
		mux {
			function = "uart";
			groups = "uart0_txd_rxd";
		};
	};

	watchdog_pins: watchdog-default {
		mux {
			function = "watchdog";
			groups = "watchdog";
		};
	};
};

&snfi {
	pinctrl-names = "default", "snfi";
	pinctrl-0 = <&snor_pins>;
	pinctrl-1 = <&snfi_pins>;
	status = "okay";

	spi-flash@0{
		compatible = "jedec,spi-nor";
		reg = <0>;
		u-boot,dm-pre-reloc;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
};

&xhci {
	status = "okay";
};

&u3phy {
	status = "okay";
};

&watchdog {
	pinctrl-names = "default";
	pinctrl-0 = <&watchdog_pins>;
	status = "okay";
};