blob: 4bfa0c2330ba436c0a45bfca0a7d04e640c8bca2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
|
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd
*/
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr3-666.dtsi"
/{
gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "gmac_clkin";
#clock-cells = <0>;
};
vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc5v0_host_xhci";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
&gmac2io {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
tx_delay = <0x26>;
rx_delay = <0x11>;
status = "okay";
};
&gmac2phy {
/* Integrated PHY unsupported by U-boot */
status = "broken";
};
&usb_host0_xhci {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
};
|
