summaryrefslogtreecommitdiff
path: root/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
blob: a3870716740f03edc0c1f9ab1667be074e48e34a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
 */

#include "socfpga_cyclone5.dtsi"

/ {
	model = "Devboards.de DBM-SoC1";
	compatible = "altr,socfpga-cyclone5", "altr,socfpga";

	chosen {
		bootargs = "console=ttyS0,115200";
		stdout-path = "serial0:115200n8";
	};

	aliases {
		ethernet0 = &gmac1;
		udc0 = &usb1;
	};

	memory {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1GB */
	};

	soc {
		u-boot,dm-pre-reloc;
	};
};

&gmac1 {
	status = "okay";
	phy-mode = "rgmii";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&porta {
	bank-name = "porta";
};

&portb {
	bank-name = "portb";
};

&portc {
	bank-name = "portc";
};

&mmc0 {
	status = "okay";
	u-boot,dm-pre-reloc;
};

&usb1 {
	disable-over-current;
	status = "okay";
};

&uart0 {
	u-boot,dm-pre-reloc;
};

&watchdog0 {
	status = "disabled";
};