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/dts-v1/;
/ {
model = "ST STV0991 application board";
compatible = "st,stv0991";
#address-cells = <1>;
#size-cells = <1>;
chosen {
stdout-path = &uart0;
};
memory {
device_type="memory";
reg = <0x0 0x198000>;
};
uart0: serial@0x80406000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80406000 0x1000>;
clock = <2700000>;
};
aliases {
spi0 = "/spi@80203000"; /* QSPI */
};
qspi: spi@80203000 {
compatible = "cadence,qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x80203000 0x100>,
<0x40000000 0x1000000>;
clocks = <3750000>;
ext-decoder = <0>; /* external decoder */
num-cs = <4>;
fifo-depth = <256>;
sram-size = <256>;
bus-num = <0>;
status = "okay";
flash0: n25q32@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <50000000>;
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
read-delay = <4>; /* delay value in read data capture register */
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
};
};
};
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