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// SPDX-License-Identifier: GPL-2.0
/*
* dts file for Xilinx Versal Mini eMMC0 Configuration
*
* (C) Copyright 2018-2019, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
/ {
compatible = "xlnx,versal";
#address-cells = <2>;
#size-cells = <2>;
model = "Xilinx Versal MINI eMMC0";
clk25: clk25 {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <25000000>;
};
dcc: dcc {
compatible = "arm,dcc";
status = "okay";
u-boot,dm-pre-reloc;
};
amba: amba {
u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
sdhci0: sdhci@f1040000 {
compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
status = "okay";
reg = <0x0 0xf1040000 0x0 0x10000>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clk25 &clk25>;
xlnx,device_id = <0>;
no-1-8-v;
xlnx,mio_bank = <0>;
#stream-id-cells = <1>;
};
};
aliases {
serial0 = &dcc;
mmc0 = &sdhci0;
};
chosen {
stdout-path = "serial0:115200";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x20000000>;
};
};
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