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/*
* Xilinx CSE QSPI single DTS
*
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "zynq-cse-qspi.dtsi"
&qspi {
spi-rx-bus-width = <4>;
};
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