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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018 NXP
*/
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dm/uclass.h>
#include <errno.h>
#include <asm/arch/sci/sci.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch-imx/cpu.h>
#include <asm/armv8/cpu.h>
#include <asm/mach-imx/boot_mode.h>
DECLARE_GLOBAL_DATA_PTR;
u32 get_cpu_rev(void)
{
u32 id = 0, rev = 0;
int ret;
ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id);
if (ret)
return 0;
rev = (id >> 5) & 0xf;
id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */
return (id << 12) | rev;
}
#ifdef CONFIG_DISPLAY_CPUINFO
const char *get_imx8_type(u32 imxtype)
{
switch (imxtype) {
case MXC_CPU_IMX8QXP:
return "8QXP";
default:
return "??";
}
}
const char *get_imx8_rev(u32 rev)
{
switch (rev) {
case CHIP_REV_A:
return "A";
case CHIP_REV_B:
return "B";
default:
return "?";
}
}
const char *get_core_name(void)
{
if (is_cortex_a35())
return "A35";
else
return "?";
}
int print_cpuinfo(void)
{
struct udevice *dev;
struct clk cpu_clk;
int ret;
ret = uclass_get_device(UCLASS_CPU, 0, &dev);
if (ret)
return 0;
ret = clk_get_by_index(dev, 0, &cpu_clk);
if (ret) {
dev_err(dev, "failed to clk\n");
return 0;
}
u32 cpurev;
cpurev = get_cpu_rev();
printf("CPU: Freescale i.MX%s rev%s %s at %ld MHz\n",
get_imx8_type((cpurev & 0xFF000) >> 12),
get_imx8_rev((cpurev & 0xFFF)),
get_core_name(),
clk_get_rate(&cpu_clk) / 1000000);
return 0;
}
#endif
int print_bootinfo(void)
{
enum boot_device bt_dev = get_boot_device();
puts("Boot: ");
switch (bt_dev) {
case SD1_BOOT:
puts("SD0\n");
break;
case SD2_BOOT:
puts("SD1\n");
break;
case SD3_BOOT:
puts("SD2\n");
break;
case MMC1_BOOT:
puts("MMC0\n");
break;
case MMC2_BOOT:
puts("MMC1\n");
break;
case MMC3_BOOT:
puts("MMC2\n");
break;
case FLEXSPI_BOOT:
puts("FLEXSPI\n");
break;
case SATA_BOOT:
puts("SATA\n");
break;
case NAND_BOOT:
puts("NAND\n");
break;
case USB_BOOT:
puts("USB\n");
break;
default:
printf("Unknown device %u\n", bt_dev);
break;
}
return 0;
}
enum boot_device get_boot_device(void)
{
enum boot_device boot_dev = SD1_BOOT;
sc_rsrc_t dev_rsrc;
sc_misc_get_boot_dev(-1, &dev_rsrc);
switch (dev_rsrc) {
case SC_R_SDHC_0:
boot_dev = MMC1_BOOT;
break;
case SC_R_SDHC_1:
boot_dev = SD2_BOOT;
break;
case SC_R_SDHC_2:
boot_dev = SD3_BOOT;
break;
case SC_R_NAND:
boot_dev = NAND_BOOT;
break;
case SC_R_FSPI_0:
boot_dev = FLEXSPI_BOOT;
break;
case SC_R_SATA_0:
boot_dev = SATA_BOOT;
break;
case SC_R_USB_0:
case SC_R_USB_1:
case SC_R_USB_2:
boot_dev = USB_BOOT;
break;
default:
break;
}
return boot_dev;
}
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