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// SPDX-License-Identifier: GPL-2.0+
/*
* K3: Common Architecture initialization
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
* Lokesh Vutla <lokeshvutla@ti.com>
*/
#include <common.h>
#include <spl.h>
#include "common.h"
#include <dm.h>
#include <remoteproc.h>
#include <linux/soc/ti/ti_sci_protocol.h>
#include <fdt_support.h>
#include <asm/arch/sys_proto.h>
#include <asm/hardware.h>
#include <asm/io.h>
struct ti_sci_handle *get_ti_sci_handle(void)
{
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
DM_GET_DRIVER(ti_sci), &dev);
if (ret)
panic("Failed to get SYSFW (%d)\n", ret);
return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
}
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_K3_EARLY_CONS
int early_console_init(void)
{
struct udevice *dev;
int ret;
gd->baudrate = CONFIG_BAUDRATE;
ret = uclass_get_device_by_seq(UCLASS_SERIAL, CONFIG_K3_EARLY_CONS_IDX,
&dev);
if (ret) {
printf("Error getting serial dev for early console! (%d)\n",
ret);
return ret;
}
gd->cur_serial_dev = dev;
gd->flags |= GD_FLG_SERIAL_READY;
gd->have_console = 1;
return 0;
}
#endif
#ifdef CONFIG_SYS_K3_SPL_ATF
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
int ret;
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
/*
* It is assumed that remoteproc device 1 is the corresponding
* Cortex-A core which runs ATF. Make sure DT reflects the same.
*/
ret = rproc_dev_init(1);
if (ret)
panic("%s: ATF failed to initialize on rproc (%d)\n", __func__,
ret);
ret = rproc_load(1, spl_image->entry_point, 0x200);
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
/* Add an extra newline to differentiate the ATF logs from SPL */
printf("Starting ATF on ARM64 core...\n\n");
ret = rproc_start(1);
if (ret)
panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
debug("Releasing resources...\n");
release_resources_for_core_shutdown();
debug("Finalizing core shutdown...\n");
while (1)
asm volatile("wfe");
}
#endif
#if defined(CONFIG_OF_LIBFDT)
int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
{
u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
int ret, node, subnode, len, prev_node;
u32 range[4], addr, size;
const fdt32_t *sub_reg;
ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
msmc_size = msmc_end - msmc_start + 1;
debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
msmc_start, msmc_size);
/* find or create "msmc_sram node */
ret = fdt_path_offset(blob, parent_path);
if (ret < 0)
return ret;
node = fdt_find_or_add_subnode(blob, ret, node_name);
if (node < 0)
return node;
ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
if (ret < 0)
return ret;
reg[0] = cpu_to_fdt64(msmc_start);
reg[1] = cpu_to_fdt64(msmc_size);
ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
if (ret < 0)
return ret;
fdt_setprop_cell(blob, node, "#address-cells", 1);
fdt_setprop_cell(blob, node, "#size-cells", 1);
range[0] = 0;
range[1] = cpu_to_fdt32(msmc_start >> 32);
range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
range[3] = cpu_to_fdt32(msmc_size);
ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
if (ret < 0)
return ret;
subnode = fdt_first_subnode(blob, node);
prev_node = 0;
/* Look for invalid subnodes and delete them */
while (subnode >= 0) {
sub_reg = fdt_getprop(blob, subnode, "reg", &len);
addr = fdt_read_number(sub_reg, 1);
sub_reg++;
size = fdt_read_number(sub_reg, 1);
debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
subnode, addr, size);
if (addr + size > msmc_size ||
!strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
!strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
fdt_del_node(blob, subnode);
debug("%s: deleting subnode %d\n", __func__, subnode);
if (!prev_node)
subnode = fdt_first_subnode(blob, node);
else
subnode = fdt_next_subnode(blob, prev_node);
} else {
prev_node = subnode;
subnode = fdt_next_subnode(blob, prev_node);
}
}
return 0;
}
int fdt_disable_node(void *blob, char *node_path)
{
int offs;
int ret;
offs = fdt_path_offset(blob, node_path);
if (offs < 0) {
debug("Node %s not found.\n", node_path);
return 0;
}
ret = fdt_setprop_string(blob, offs, "status", "disabled");
if (ret < 0) {
printf("Could not add status property to node %s: %s\n",
node_path, fdt_strerror(ret));
return ret;
}
return 0;
}
#endif
#ifndef CONFIG_SYSRESET
void reset_cpu(ulong ignored)
{
}
#endif
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
u32 soc, rev;
char *name;
soc = (readl(CTRLMMR_WKUP_JTAG_DEVICE_ID) &
DEVICE_ID_FAMILY_MASK) >> DEVICE_ID_FAMILY_SHIFT;
rev = (readl(CTRLMMR_WKUP_JTAG_ID) &
JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
printf("SoC: ");
switch (soc) {
case AM654:
name = "AM654";
break;
case J721E:
name = "J721E";
break;
default:
name = "Unknown Silicon";
};
printf("%s PG ", name);
switch (rev) {
case REV_PG1_0:
name = "1.0";
break;
case REV_PG2_0:
name = "2.0";
break;
default:
name = "Unknown Revision";
};
printf("%s\n", name);
return 0;
}
#endif
#ifdef CONFIG_ARM64
void board_prep_linux(bootm_headers_t *images)
{
debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
images->os.start, images->os.end);
__asm_flush_dcache_range(images->os.start,
ROUND(images->os.end,
CONFIG_SYS_CACHELINE_SIZE));
}
#endif
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