blob: 0622a1e16e0dfc3a63b04fa46f962538958eca66 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
|
/*
* Copyright (C) 2014 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <nand.h>
#include <asm/io.h>
#include <../drivers/mtd/nand/denali.h>
static void nand_denali_wp_disable(void)
{
#ifdef CONFIG_NAND_DENALI
/*
* Since the boot rom enables the write protection for NAND boot mode,
* it must be disabled somewhere for "nand write", "nand erase", etc.
* The workaround is here to not disturb the Denali NAND controller
* driver just for a really SoC-specific thing.
*/
void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
#endif
}
int board_late_init(void)
{
puts("MODE: ");
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
printf("eMMC Boot\n");
setenv("bootmode", "emmcboot");
break;
case BOOT_DEVICE_NAND:
printf("NAND Boot\n");
setenv("bootmode", "nandboot");
nand_denali_wp_disable();
break;
case BOOT_DEVICE_NOR:
printf("NOR Boot\n");
setenv("bootmode", "norboot");
break;
default:
printf("Unsupported Boot Mode\n");
return -1;
}
return 0;
}
|
