blob: 6fdf910895765b6b7fbfbe06f7620926cdd77095 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
|
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include "../init.h"
#include "../sg-regs.h"
int ph1_sld3_memconf_init(const struct uniphier_board_data *bd)
{
u32 tmp;
unsigned long size_per_word;
tmp = readl(SG_MEMCONF);
tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK);
switch (bd->dram_ch[2].width) {
case 16:
tmp |= SG_MEMCONF_CH2_NUM_1;
size_per_word = bd->dram_ch[2].size;
break;
case 32:
tmp |= SG_MEMCONF_CH2_NUM_2;
size_per_word = bd->dram_ch[2].size >> 1;
break;
default:
pr_err("error: unsupported DRAM Ch2 width\n");
return -EINVAL;
}
/* Set DDR size */
switch (size_per_word) {
case SZ_64M:
tmp |= SG_MEMCONF_CH2_SZ_64M;
break;
case SZ_128M:
tmp |= SG_MEMCONF_CH2_SZ_128M;
break;
case SZ_256M:
tmp |= SG_MEMCONF_CH2_SZ_256M;
break;
case SZ_512M:
tmp |= SG_MEMCONF_CH2_SZ_512M;
break;
default:
pr_err("error: unsupported DRAM Ch2 size\n");
return -EINVAL;
}
writel(tmp, SG_MEMCONF);
return 0;
}
|