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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
*/
#include <dt-bindings/clock/bcm6318-clock.h>
#include <dt-bindings/dma/bcm6318-dma.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/power-domain/bcm6318-power-domain.h>
#include <dt-bindings/reset/bcm6318-reset.h>
#include "skeleton.dtsi"
/ {
compatible = "brcm,bcm6318";
aliases {
spi0 = &spi;
};
cpus {
reg = <0x10000000 0x4>;
#address-cells = <1>;
#size-cells = <0>;
u-boot,dm-pre-reloc;
cpu@0 {
compatible = "brcm,bcm6318-cpu", "mips,mips4Kc";
device_type = "cpu";
reg = <0>;
u-boot,dm-pre-reloc;
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <250000000>;
};
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
u-boot,dm-pre-reloc;
};
periph_clk: periph-clk {
compatible = "brcm,bcm6345-clk";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
ubus_clk: ubus-clk {
compatible = "brcm,bcm6345-clk";
reg = <0x10000008 0x4>;
#clock-cells = <1>;
};
};
ubus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
periph_rst: reset-controller@10000010 {
compatible = "brcm,bcm6345-reset";
reg = <0x10000010 0x4>;
#reset-cells = <1>;
};
wdt: watchdog@10000068 {
compatible = "brcm,bcm6345-wdt";
reg = <0x10000068 0xc>;
clocks = <&periph_osc>;
};
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdt>;
};
pll_cntl: syscon@10000074 {
compatible = "syscon";
reg = <0x10000074 0x4>;
};
syscon-reboot {
compatible = "syscon-reboot";
regmap = <&pll_cntl>;
offset = <0x0>;
mask = <0x1>;
};
gpio1: gpio-controller@10000080 {
compatible = "brcm,bcm6345-gpio";
reg = <0x10000080 0x4>, <0x10000088 0x4>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <18>;
status = "disabled";
};
gpio0: gpio-controller@10000084 {
compatible = "brcm,bcm6345-gpio";
reg = <0x10000084 0x4>, <0x1000008c 0x4>;
gpio-controller;
#gpio-cells = <2>;
status = "disabled";
};
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
clocks = <&periph_osc>;
status = "disabled";
};
leds: led-controller@10000200 {
compatible = "brcm,bcm6328-leds";
reg = <0x10000200 0x28>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
periph_pwr: power-controller@100008e8 {
compatible = "brcm,bcm6328-power-domain";
reg = <0x100008e8 0x4>;
#power-domain-cells = <1>;
};
spi: spi@10003000 {
compatible = "brcm,bcm6328-hsspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10003000 0x600>;
clocks = <&periph_clk BCM6318_CLK_HSSPI>, <&hsspi_pll>;
clock-names = "hsspi", "pll";
resets = <&periph_rst BCM6318_RST_SPI>;
spi-max-frequency = <33333334>;
num-cs = <3>;
status = "disabled";
};
memory-controller@10004000 {
compatible = "brcm,bcm6318-mc";
reg = <0x10004000 0x38>;
u-boot,dm-pre-reloc;
};
ehci: usb-controller@10005000 {
compatible = "brcm,bcm6318-ehci", "generic-ehci";
reg = <0x10005000 0x100>;
phys = <&usbh>;
big-endian;
status = "disabled";
};
ohci: usb-controller@10005100 {
compatible = "brcm,bcm6318-ohci", "generic-ohci";
reg = <0x10005100 0x100>;
phys = <&usbh>;
big-endian;
status = "disabled";
};
usbh: usb-phy@10005200 {
compatible = "brcm,bcm6318-usbh";
reg = <0x10005200 0x30>;
#phy-cells = <0>;
clocks = <&periph_clk BCM6318_CLK_USB>;
clock-names = "usbh";
power-domains = <&periph_pwr BCM6318_PWR_USB>;
resets = <&periph_rst BCM6318_RST_USBH>;
status = "disabled";
};
enet: ethernet@10080000 {
compatible = "brcm,bcm6368-enet";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10080000 0x8000>;
clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
<&periph_clk BCM6318_CLK_ROBOSW025>,
<&ubus_clk BCM6318_UCLK_ROBOSW>;
resets = <&periph_rst BCM6318_RST_ENETSW>,
<&periph_rst BCM6318_RST_EPHY>;
dmas = <&iudma BCM6318_DMA_ENETSW_RX>,
<&iudma BCM6318_DMA_ENETSW_TX>;
dma-names = "rx",
"tx";
brcm,num-ports = <5>;
status = "disabled";
};
iudma: dma-controller@10088000 {
compatible = "brcm,bcm6368-iudma";
reg = <0x10088000 0x80>,
<0x10088200 0x80>,
<0x10088400 0x80>;
reg-names = "dma",
"dma-channels",
"dma-sram";
#dma-cells = <1>;
dma-channels = <8>;
};
};
};
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