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/*
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dt-bindings/clock/bcm6358-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/bcm6358-reset.h>
#include "skeleton.dtsi"
/ {
compatible = "brcm,bcm6358";
cpus {
reg = <0xfffe0000 0x4>;
#address-cells = <1>;
#size-cells = <0>;
u-boot,dm-pre-reloc;
cpu@0 {
compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
device_type = "cpu";
reg = <0>;
u-boot,dm-pre-reloc;
};
cpu@1 {
compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
device_type = "cpu";
reg = <1>;
u-boot,dm-pre-reloc;
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
u-boot,dm-pre-reloc;
};
periph_clk: periph-clk {
compatible = "brcm,bcm6345-clk";
reg = <0xfffe0004 0x4>;
#clock-cells = <1>;
};
};
pflash: nor@1e000000 {
compatible = "cfi-flash";
reg = <0x1e000000 0x2000000>;
bank-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
};
ubus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
pll_cntl: syscon@fffe0008 {
compatible = "syscon";
reg = <0xfffe0008 0x4>;
};
syscon-reboot {
compatible = "syscon-reboot";
regmap = <&pll_cntl>;
offset = <0x0>;
mask = <0x1>;
};
periph_rst: reset-controller@fffe0034 {
compatible = "brcm,bcm6345-reset";
reg = <0xfffe0034 0x4>;
#reset-cells = <1>;
};
gpio1: gpio-controller@fffe0080 {
compatible = "brcm,bcm6345-gpio";
reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
status = "disabled";
};
gpio0: gpio-controller@fffe0084 {
compatible = "brcm,bcm6345-gpio";
reg = <0xfffe0084 0x4>, <0xfffe008c 0x4>;
gpio-controller;
#gpio-cells = <2>;
status = "disabled";
};
leds: led-controller@fffe00d0 {
compatible = "brcm,bcm6358-leds";
reg = <0xfffe00d0 0x8>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
uart0: serial@fffe0100 {
compatible = "brcm,bcm6345-uart";
reg = <0xfffe0100 0x18>;
clocks = <&periph_osc>;
status = "disabled";
};
uart1: serial@fffe0120 {
compatible = "brcm,bcm6345-uart";
reg = <0xfffe0120 0x18>;
clocks = <&periph_osc>;
status = "disabled";
};
memory-controller@fffe1200 {
compatible = "brcm,bcm6358-mc";
reg = <0xfffe1200 0x4c>;
u-boot,dm-pre-reloc;
};
};
};
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