summaryrefslogtreecommitdiff
path: root/arch/riscv/cpu/ax25/Kconfig
blob: 8d8d71dcbf970e64a92849b35e366078cd68218e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
config RISCV_NDS
	bool
	select ARCH_EARLY_INIT_R
	imply CPU
	imply CPU_RISCV
	imply RISCV_TIMER
	imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE)
	imply ANDES_PLMT if (RISCV_MMODE || SPL_RISCV_MMODE)
	imply SPL_CPU_SUPPORT
	imply SPL_OPENSBI
	imply SPL_LOAD_FIT
	help
	  Run U-Boot on AndeStar V5 platforms and use some specific features
	  which are provided by Andes Technology AndeStar V5 families.

if RISCV_NDS

config RISCV_NDS_CACHE
	bool "AndeStar V5 families specific cache support"
	depends on RISCV_MMODE || SPL_RISCV_MMODE
	help
	  Provide Andes Technology AndeStar V5 families specific cache support.

endif