board/imgtec/boston/ddr.c


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

/*
 * Copyright (C) 2016 Imagination Technologies
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#include <common.h>

#include <asm/io.h>

#include "boston-regs.h"

DECLARE_GLOBAL_DATA_PTR;

int initdram(void)
{
	u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0);

	gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) <<
			30;

	return 0;
}

ulong board_get_usable_ram_top(ulong total_size)
{
	DECLARE_GLOBAL_DATA_PTR;

	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
		/* 2GB wrapped around to 0 */
		return CKSEG0ADDR(256 << 20);
	}

	return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
}