1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
|
/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <ns16550.h>
#include <linux/compiler.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#ifdef CONFIG_LCD
#include <asm/arch/display.h>
#endif
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/pmu.h>
#ifdef CONFIG_PWM_TEGRA
#include <asm/arch/pwm.h>
#endif
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/board.h>
#include <asm/arch-tegra/clk_rst.h>
#include <asm/arch-tegra/pmc.h>
#include <asm/arch-tegra/sys_proto.h>
#include <asm/arch-tegra/uart.h>
#include <asm/arch-tegra/warmboot.h>
#ifdef CONFIG_TEGRA_CLOCK_SCALING
#include <asm/arch/emc.h>
#endif
#ifdef CONFIG_USB_EHCI_TEGRA
#include <asm/arch-tegra/usb.h>
#include <asm/arch/usb.h>
#endif
#ifdef CONFIG_TEGRA_MMC
#include <asm/arch-tegra/tegra_mmc.h>
#include <asm/arch-tegra/mmc.h>
#endif
#include <i2c.h>
#include <spi.h>
#include "emc.h"
DECLARE_GLOBAL_DATA_PTR;
const struct tegra_sysinfo sysinfo = {
CONFIG_TEGRA_BOARD_STRING
};
#ifndef CONFIG_SPL_BUILD
/*
* Routine: timer_init
* Description: init the timestamp and lastinc value
*/
int timer_init(void)
{
return 0;
}
#endif
void __pin_mux_usb(void)
{
}
void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
void __pin_mux_spi(void)
{
}
void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
void __gpio_early_init_uart(void)
{
}
void gpio_early_init_uart(void)
__attribute__((weak, alias("__gpio_early_init_uart")));
void __pin_mux_nand(void)
{
funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
}
void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
void __pin_mux_display(void)
{
}
void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
/*
* Routine: power_det_init
* Description: turn off power detects
*/
static void power_det_init(void)
{
#if defined(CONFIG_TEGRA20)
struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
/* turn off power detects */
writel(0, &pmc->pmc_pwr_det_latch);
writel(0, &pmc->pmc_pwr_det);
#endif
}
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
__maybe_unused int err;
/* Do clocks and UART first so that printf() works */
clock_init();
clock_verify();
#ifdef CONFIG_FDT_SPI
pin_mux_spi();
spi_init();
#endif
#ifdef CONFIG_PWM_TEGRA
if (pwm_init(gd->fdt_blob))
debug("%s: Failed to init pwm\n", __func__);
#endif
#ifdef CONFIG_LCD
pin_mux_display();
tegra_lcd_check_next_stage(gd->fdt_blob, 0);
#endif
/* boot param addr */
gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
power_det_init();
#ifdef CONFIG_SYS_I2C_TEGRA
#ifndef CONFIG_SYS_I2C_INIT_BOARD
#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
#endif
i2c_init_board();
# ifdef CONFIG_TEGRA_PMU
if (pmu_set_nominal())
debug("Failed to select nominal voltages\n");
# ifdef CONFIG_TEGRA_CLOCK_SCALING
err = board_emc_init();
if (err)
debug("Memory controller init failed: %d\n", err);
# endif
# endif /* CONFIG_TEGRA_PMU */
#endif /* CONFIG_SYS_I2C_TEGRA */
#ifdef CONFIG_USB_EHCI_TEGRA
pin_mux_usb();
board_usb_init(gd->fdt_blob);
#endif
#ifdef CONFIG_LCD
tegra_lcd_check_next_stage(gd->fdt_blob, 0);
#endif
#ifdef CONFIG_TEGRA_NAND
pin_mux_nand();
#endif
#ifdef CONFIG_TEGRA_LP0
/* save Sdram params to PMC 2, 4, and 24 for WB0 */
warmboot_save_sdram_params();
/* prepare the WB code to LP0 location */
warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
#endif
return 0;
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
static void __gpio_early_init(void)
{
}
void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
int board_early_init_f(void)
{
#if !defined(CONFIG_TEGRA20)
pinmux_init();
#endif
board_init_uart_f();
/* Initialize periph GPIOs */
gpio_early_init();
gpio_early_init_uart();
#ifdef CONFIG_LCD
tegra_lcd_early_init(gd->fdt_blob);
#endif
return 0;
}
#endif /* EARLY_INIT */
int board_late_init(void)
{
#ifdef CONFIG_LCD
/* Make sure we finish initing the LCD */
tegra_lcd_check_next_stage(gd->fdt_blob, 1);
#endif
return 0;
}
#if defined(CONFIG_TEGRA_MMC)
void __pin_mux_mmc(void)
{
}
void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
debug("%s called\n", __func__);
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
debug("%s: init MMC\n", __func__);
tegra_mmc_init();
return 0;
}
void pad_init_mmc(struct mmc_host *host)
{
#if defined(CONFIG_TEGRA30)
enum periph_id id = host->mmc_id;
u32 val;
debug("%s: sdmmc address = %08x, id = %d\n", __func__,
(unsigned int)host->reg, id);
/* Set the pad drive strength for SDMMC1 or 3 only */
if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
__func__);
return;
}
val = readl(&host->reg->sdmemcmppadctl);
val &= 0xFFFFFFF0;
val |= MEMCOMP_PADCTRL_VREF;
writel(val, &host->reg->sdmemcmppadctl);
val = readl(&host->reg->autocalcfg);
val &= 0xFFFF0000;
val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
writel(val, &host->reg->autocalcfg);
#endif /* T30 */
}
#endif /* MMC */
|
