blob: d6fb4da82b4cfc6d033bb408512bc3ac9c04cda5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
|
/*
* Copyright (C) 2007,2008
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <ide.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pci.h>
int checkboard(void)
{
puts("BOARD: Renesas Solutions R2D Plus\n");
return 0;
}
int board_init(void)
{
return 0;
}
int board_late_init(void)
{
return 0;
}
#define FPGA_BASE 0xA4000000
#define FPGA_CFCTL (FPGA_BASE + 0x04)
#define CFCTL_EN (0x432)
#define FPGA_CFPOW (FPGA_BASE + 0x06)
#define CFPOW_ON (0x02)
#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
#define CFCDINTCLR_EN (0x01)
void ide_set_reset(int idereset)
{
/* if reset = 1 IDE reset will be asserted */
if (idereset) {
outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
}
}
static struct pci_controller hose;
void pci_init_board(void)
{
pci_sh7751_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
|
