1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2014 Google, Inc.
*/
#define IOTRACE_IMPL
#include <common.h>
#include <mapmem.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
/* Support up to the machine word length for now */
typedef ulong iovalue_t;
enum iotrace_flags {
IOT_8 = 0,
IOT_16,
IOT_32,
IOT_READ = 0 << 3,
IOT_WRITE = 1 << 3,
};
/**
* struct iotrace_record - Holds a single I/O trace record
*
* @flags: I/O access type
* @addr: Address of access
* @value: Value written or read
*/
struct iotrace_record {
enum iotrace_flags flags;
phys_addr_t addr;
iovalue_t value;
};
/**
* struct iotrace - current trace status and checksum
*
* @start: Start address of iotrace buffer
* @size: Size of iotrace buffer in bytes
* @offset: Current write offset into iotrace buffer
* @crc32: Current value of CRC chceksum of trace records
* @enabled: true if enabled, false if disabled
*/
static struct iotrace {
ulong start;
ulong size;
ulong offset;
u32 crc32;
bool enabled;
} iotrace;
static void add_record(int flags, const void *ptr, ulong value)
{
struct iotrace_record srec, *rec = &srec;
/*
* We don't support iotrace before relocation. Since the trace buffer
* is set up by a command, it can't be enabled at present. To change
* this we would need to set the iotrace buffer at build-time. See
* lib/trace.c for how this might be done if you are interested.
*/
if (!(gd->flags & GD_FLG_RELOC) || !iotrace.enabled)
return;
/* Store it if there is room */
if (iotrace.offset + sizeof(*rec) < iotrace.size) {
rec = (struct iotrace_record *)map_sysmem(
iotrace.start + iotrace.offset,
sizeof(value));
}
rec->flags = flags;
rec->addr = map_to_sysmem(ptr);
rec->value = value;
/* Update our checksum */
iotrace.crc32 = crc32(iotrace.crc32, (unsigned char *)rec,
sizeof(*rec));
iotrace.offset += sizeof(struct iotrace_record);
}
u32 iotrace_readl(const void *ptr)
{
u32 v;
v = readl(ptr);
add_record(IOT_32 | IOT_READ, ptr, v);
return v;
}
void iotrace_writel(ulong value, const void *ptr)
{
add_record(IOT_32 | IOT_WRITE, ptr, value);
writel(value, ptr);
}
u16 iotrace_readw(const void *ptr)
{
u32 v;
v = readw(ptr);
add_record(IOT_16 | IOT_READ, ptr, v);
return v;
}
void iotrace_writew(ulong value, const void *ptr)
{
add_record(IOT_16 | IOT_WRITE, ptr, value);
writew(value, ptr);
}
u8 iotrace_readb(const void *ptr)
{
u32 v;
v = readb(ptr);
add_record(IOT_8 | IOT_READ, ptr, v);
return v;
}
void iotrace_writeb(ulong value, const void *ptr)
{
add_record(IOT_8 | IOT_WRITE, ptr, value);
writeb(value, ptr);
}
void iotrace_reset_checksum(void)
{
iotrace.crc32 = 0;
}
u32 iotrace_get_checksum(void)
{
return iotrace.crc32;
}
void iotrace_set_enabled(int enable)
{
iotrace.enabled = enable;
}
int iotrace_get_enabled(void)
{
return iotrace.enabled;
}
void iotrace_set_buffer(ulong start, ulong size)
{
iotrace.start = start;
iotrace.size = size;
iotrace.offset = 0;
iotrace.crc32 = 0;
}
void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong *count)
{
*start = iotrace.start;
*size = iotrace.size;
*offset = iotrace.offset;
*count = iotrace.offset / sizeof(struct iotrace_record);
}
|
