configs/MPC837XEMDS_defconfig


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CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC837XEMDS=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_6_1=y
CONFIG_CORE_PLL_RATIO_15_1=y
CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
CONFIG_LDP_PIN_MUX_STATE_0=y
CONFIG_BAT0=y
CONFIG_BAT0_NAME="SDRAM_LOWER"
CONFIG_BAT0_BASE=0x00000000
CONFIG_BAT0_LENGTH_256_MBYTES=y
CONFIG_BAT0_ACCESS_RW=y
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT0_USER_MODE_VALID=y
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
CONFIG_BAT1=y
CONFIG_BAT1_NAME="SDRAM_UPPER"
CONFIG_BAT1_BASE=0x10000000
CONFIG_BAT1_LENGTH_256_MBYTES=y
CONFIG_BAT1_ACCESS_RW=y
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT1_USER_MODE_VALID=y
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
CONFIG_BAT2=y
CONFIG_BAT2_NAME="IMMR"
CONFIG_BAT2_BASE=0xE0000000
CONFIG_BAT2_LENGTH_8_MBYTES=y
CONFIG_BAT2_ACCESS_RW=y
CONFIG_BAT2_ICACHE_INHIBITED=y
CONFIG_BAT2_ICACHE_GUARDED=y
CONFIG_BAT2_DCACHE_INHIBITED=y
CONFIG_BAT2_DCACHE_GUARDED=y
CONFIG_BAT2_USER_MODE_VALID=y
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
CONFIG_BAT3=y
CONFIG_BAT3_NAME="BCSR"
CONFIG_BAT3_BASE=0xF8000000
CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_ICACHE_INHIBITED=y
CONFIG_BAT3_ICACHE_GUARDED=y
CONFIG_BAT3_DCACHE_INHIBITED=y
CONFIG_BAT3_DCACHE_GUARDED=y
CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_BAT4=y
CONFIG_BAT4_NAME="FLASH"
CONFIG_BAT4_BASE=0xFE000000
CONFIG_BAT4_LENGTH_32_MBYTES=y
CONFIG_BAT4_ACCESS_RW=y
CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT4_DCACHE_INHIBITED=y
CONFIG_BAT4_DCACHE_GUARDED=y
CONFIG_BAT4_USER_MODE_VALID=y
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
CONFIG_BAT5=y
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
CONFIG_BAT5_BASE=0xE6000000
CONFIG_BAT5_ACCESS_RW=y
CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_HID0_FINAL_EMCP=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
CONFIG_ACR_PIPE_DEP_4=y
CONFIG_ACR_RPTCNT_4=y
CONFIG_SPCR_TSECEP_3=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_PHY_MARVELL=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_ELBC_BR0_OR0=y
CONFIG_BR0_OR0_NAME="FLASH"
CONFIG_BR0_OR0_BASE=0xFE000000
CONFIG_BR0_MACHINE_GPCM=y
CONFIG_BR0_PORTSIZE_16BIT=y
CONFIG_OR0_AM_32_MBYTES=y
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
CONFIG_OR0_CSNT_EARLIER=y
CONFIG_OR0_EAD_EXTRA=y
CONFIG_OR0_SCY_15=y
CONFIG_OR0_XACS_EXTENDED=y
CONFIG_OR0_XAM_SET=y
CONFIG_OR0_TRLX_RELAXED=y
CONFIG_OR0_EHTR_8_CYCLE=y
CONFIG_ELBC_BR1_OR1=y
CONFIG_BR1_OR1_NAME="BCSR"
CONFIG_BR1_OR1_BASE=0xF8000000
CONFIG_BR1_MACHINE_GPCM=y
CONFIG_BR1_PORTSIZE_8BIT=y
CONFIG_OR1_AM_32_KBYTES=y
CONFIG_OR1_CSNT_EARLIER=y
CONFIG_OR1_EAD_EXTRA=y
CONFIG_OR1_SCY_15=y
CONFIG_OR1_XACS_EXTENDED=y
CONFIG_OR1_XAM_SET=y
CONFIG_OR1_TRLX_RELAXED=y
CONFIG_OR1_EHTR_8_CYCLE=y
CONFIG_ELBC_BR3_OR3=y
CONFIG_BR3_OR3_NAME="NAND"
CONFIG_BR3_OR3_BASE=0xE0600000
CONFIG_BR3_ERRORCHECKING_BOTH=y
CONFIG_BR3_MACHINE_FCM=y
CONFIG_BR3_PORTSIZE_8BIT=y
CONFIG_OR3_AM_32_KBYTES=y
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
CONFIG_OR3_RST_ONE_CLOCK=y
CONFIG_OR3_SCY_1=y
CONFIG_OR3_TRLX_RELAXED=y
CONFIG_OR3_CHT_TWO_CLOCK=y
CONFIG_OR3_CST_ONE_CLOCK=y
CONFIG_OR3_EHTR_8_CYCLE=y
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
CONFIG_LCRR_CLKDIV_8=y