blob: a72c6b050d3c567f36722bc253aff04b85b6f176 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
* Qualcomm Atheros PHY Device Tree binding
Required properties:
- reg: PHY address
Optional properties:
- qca,clk-out-frequency: Clock frequency of the CLK_25M pin in Hz.
Either 25000000, 50000000, 62500000 or 125000000.
- qca,clk-out-strength: Clock output buffer driver strength.
Supported values are defined in dt-bindings/net/qca-ar803x.h
- qca,keep-pll-enabled: Keep the PLL running if no link is present.
Don't go into hibernation mode.
Only supported on the AR8031/AR8033.
- vddio-supply: RGMII I/O voltage regulator
Only supported on the AR8031/AR8033.
Optional subnodes:
- vddio-regulator: Initial data for the VDDIO regulator, as covered
doc/device-tree-bindings/regulator/regulator.txt
Example:
#include <dt-bindings/net/qca-ar803x.h>
ethernet-phy@0 {
reg = <0>;
qca,clk-out-frequency = <125000000>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
|