summaryrefslogtreecommitdiff
path: root/drivers/fpga/fpga.c
blob: 7e8bd7eae881d23c641eb1869b099db19c82f652 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/* Generic FPGA support */
#include <common.h>             /* core U-Boot definitions */
#include <xilinx.h>             /* xilinx specific definitions */
#include <altera.h>             /* altera specific definitions */
#include <lattice.h>

/* Local definitions */
#ifndef CONFIG_MAX_FPGA_DEVICES
#define CONFIG_MAX_FPGA_DEVICES		5
#endif

/* Local static data */
static int next_desc = FPGA_INVALID_DEVICE;
static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];

/*
 * fpga_no_sup
 * 'no support' message function
 */
static void fpga_no_sup(char *fn, char *msg)
{
	if (fn && msg)
		printf("%s: No support for %s.\n", fn, msg);
	else if (msg)
		printf("No support for %s.\n", msg);
	else
		printf("No FPGA support!\n");
}


/* fpga_get_desc
 *	map a device number to a descriptor
 */
const fpga_desc *const fpga_get_desc(int devnum)
{
	fpga_desc *desc = (fpga_desc *)NULL;

	if ((devnum >= 0) && (devnum < next_desc)) {
		desc = &desc_table[devnum];
		debug("%s: found fpga descriptor #%d @ 0x%p\n",
		      __func__, devnum, desc);
	}

	return desc;
}

/*
 * fpga_validate
 *	generic parameter checking code
 */
const fpga_desc *const fpga_validate(int devnum, const void *buf,
				     size_t bsize, char *fn)
{
	const fpga_desc *desc = fpga_get_desc(devnum);

	if (!desc)
		printf("%s: Invalid device number %d\n", fn, devnum);

	if (!buf) {
		printf("%s: Null buffer.\n", fn);
		return (fpga_desc * const)NULL;
	}
	return desc;
}

/*
 * fpga_dev_info
 *	generic multiplexing code
 */
static int fpga_dev_info(int devnum)
{
	int ret_val = FPGA_FAIL; /* assume failure */
	const fpga_desc * const desc = fpga_get_desc(devnum);

	if (desc) {
		debug("%s: Device Descriptor @ 0x%p\n",
		      __func__, desc->devdesc);

		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			printf("Xilinx Device\nDescriptor @ 0x%p\n", desc);
			ret_val = xilinx_info(desc->devdesc);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
			printf("Altera Device\nDescriptor @ 0x%p\n", desc);
			ret_val = altera_info(desc->devdesc);
#else
			fpga_no_sup((char *)__func__, "Altera devices");
#endif
			break;
		case fpga_lattice:
#if defined(CONFIG_FPGA_LATTICE)
			printf("Lattice Device\nDescriptor @ 0x%p\n", desc);
			ret_val = lattice_info(desc->devdesc);
#else
			fpga_no_sup((char *)__func__, "Lattice devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	} else {
		printf("%s: Invalid device number %d\n", __func__, devnum);
	}

	return ret_val;
}

/*
 * fpga_init is usually called from misc_init_r() and MUST be called
 * before any of the other fpga functions are used.
 */
void fpga_init(void)
{
	next_desc = 0;
	memset(desc_table, 0, sizeof(desc_table));

	debug("%s\n", __func__);
}

/*
 * fpga_count
 * Basic interface function to get the current number of devices available.
 */
int fpga_count(void)
{
	return next_desc;
}

/*
 * fpga_add
 *	Add the device descriptor to the device table.
 */
int fpga_add(fpga_type devtype, void *desc)
{
	int devnum = FPGA_INVALID_DEVICE;

	if (!desc) {
		printf("%s: NULL device descriptor\n", __func__);
		return devnum;
	}

	if (next_desc < 0) {
		printf("%s: FPGA support not initialized!\n", __func__);
	} else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) {
		if (next_desc < CONFIG_MAX_FPGA_DEVICES) {
			devnum = next_desc;
			desc_table[next_desc].devtype = devtype;
			desc_table[next_desc++].devdesc = desc;
		} else {
			printf("%s: Exceeded Max FPGA device count\n",
			       __func__);
		}
	} else {
		printf("%s: Unsupported FPGA type %d\n", __func__, devtype);
	}

	return devnum;
}

/*
 * Return 1 if the fpga data is partial.
 * This is only required for fpga drivers that support bitstream_type.
 */
int __weak fpga_is_partial_data(int devnum, size_t img_len)
{
	return 0;
}

/*
 * Convert bitstream data and load into the fpga
 */
int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
			      bitstream_type bstype)
{
	printf("Bitstream support not implemented for this FPGA device\n");
	return FPGA_FAIL;
}

#if defined(CONFIG_CMD_FPGA_LOADFS)
int fpga_fsload(int devnum, const void *buf, size_t size,
		 fpga_fs_info *fpga_fsinfo)
{
	int ret_val = FPGA_FAIL;           /* assume failure */
	const fpga_desc *desc = fpga_validate(devnum, buf, size,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_loadfs(desc->devdesc, buf, size,
						fpga_fsinfo);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}
#endif

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
int fpga_loads(int devnum, const void *buf, size_t size,
	       struct fpga_secure_info *fpga_sec_info)
{
	int ret_val = FPGA_FAIL;

	const fpga_desc *desc = fpga_validate(devnum, buf, size,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_loads(desc->devdesc, buf, size,
					       fpga_sec_info);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}
#endif

/*
 * Generic multiplexing code
 */
int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
{
	int ret_val = FPGA_FAIL;           /* assume failure */
	const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_load(desc->devdesc, buf, bsize,
					      bstype);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
			ret_val = altera_load(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Altera devices");
#endif
			break;
		case fpga_lattice:
#if defined(CONFIG_FPGA_LATTICE)
			ret_val = lattice_load(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Lattice devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}

/*
 * fpga_dump
 *	generic multiplexing code
 */
int fpga_dump(int devnum, const void *buf, size_t bsize)
{
	int ret_val = FPGA_FAIL;           /* assume failure */
	const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_dump(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
			ret_val = altera_dump(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Altera devices");
#endif
			break;
		case fpga_lattice:
#if defined(CONFIG_FPGA_LATTICE)
			ret_val = lattice_dump(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Lattice devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}

/*
 * fpga_info
 *	front end to fpga_dev_info.  If devnum is invalid, report on all
 *	available devices.
 */
int fpga_info(int devnum)
{
	if (devnum == FPGA_INVALID_DEVICE) {
		if (next_desc > 0) {
			int dev;

			for (dev = 0; dev < next_desc; dev++)
				fpga_dev_info(dev);

			return FPGA_SUCCESS;
		} else {
			printf("%s: No FPGA devices available.\n", __func__);
			return FPGA_FAIL;
		}
	}

	return fpga_dev_info(devnum);
}