summaryrefslogtreecommitdiff
path: root/drivers/mmc/ftsdc010_mci.h
blob: 31a27fd77281136cef04750c55332a3dc2c20cea (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
/*
 * Faraday FTSDC010 Secure Digital Memory Card Host Controller
 *
 * Copyright (C) 2011 Andes Technology Corporation
 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <mmc.h>

#ifndef __FTSDC010_MCI_H
#define __FTSDC010_MCI_H

struct ftsdc010_chip {
	void __iomem *regs;
	uint32_t wprot;   /* write protected (locked) */
	uint32_t rate;    /* actual SD clock in Hz */
	uint32_t sclk;    /* FTSDC010 source clock in Hz */
	uint32_t fifo;    /* fifo depth in bytes */
	uint32_t acmd;
	struct mmc_config cfg;	/* mmc configuration */
	const char *name;
	void *ioaddr;
	unsigned int caps;
	unsigned int version;
	unsigned int clock;
	unsigned int bus_hz;
	unsigned int div;
	int dev_index;
	int dev_id;
	int buswidth;
	u32 fifoth_val;
	struct mmc *mmc;
	void *priv;
	bool fifo_mode;
};


#ifdef CONFIG_DM_MMC
/* Export the operations to drivers */
int ftsdc010_probe(struct udevice *dev);
extern const struct dm_mmc_ops dm_ftsdc010_ops;
#endif
void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
		     uint caps, u32 max_clk, u32 min_clk);
void set_bus_width(struct ftsdc010_mmc __iomem *regs, struct mmc_config *cfg);

#ifdef CONFIG_BLK
int ftsdc010_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
#endif


#endif /* __FTSDC010_MCI_H */