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menu "NAND Device Support"
config SYS_NAND_SELF_INIT
bool
help
This option, if enabled, provides more flexible and linux-like
NAND initialization process.
config NAND_DENALI
bool "Support Denali NAND controller"
select SYS_NAND_SELF_INIT
help
Enable support for the Denali NAND controller.
config SYS_NAND_DENALI_64BIT
bool "Use 64-bit variant of Denali NAND controller"
depends on NAND_DENALI
help
The Denali NAND controller IP has some variations in terms of
the bus interface. The DMA setup sequence is completely differenct
between 32bit / 64bit AXI bus variants.
If your Denali NAND controller is the 64-bit variant, say Y.
Otherwise (32 bit), say N.
config NAND_DENALI_SPARE_AREA_SKIP_BYTES
int "Number of bytes skipped in OOB area"
depends on NAND_DENALI
range 0 63
help
This option specifies the number of bytes to skip from the beginning
of OOB area before last ECC sector data starts. This is potentially
used to preserve the bad block marker in the OOB area.
config NAND_VF610_NFC
bool "Support for Freescale NFC for VF610/MPC5125"
select SYS_NAND_SELF_INIT
help
Enables support for NAND Flash Controller on some Freescale
processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
The driver supports a maximum 2k page size. The driver
currently does not support hardware ECC.
choice
prompt "Hardware ECC strength"
depends on NAND_VF610_NFC
default SYS_NAND_VF610_NFC_45_ECC_BYTES
help
Select the ECC strength used in the hardware BCH ECC block.
config SYS_NAND_VF610_NFC_45_ECC_BYTES
bool "24-error correction (45 ECC bytes)"
config SYS_NAND_VF610_NFC_60_ECC_BYTES
bool "32-error correction (60 ECC bytes)"
endchoice
config NAND_PXA3XX
bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
select SYS_NAND_SELF_INIT
help
This enables the driver for the NAND flash device found on
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
config NAND_SUNXI
bool "Support for NAND on Allwinner SoCs in SPL"
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
select SYS_NAND_SELF_INIT
---help---
Enable support for NAND. This option allows SPL to read from
sunxi NAND using DMA transfers.
config NAND_ARASAN
bool "Configure Arasan Nand"
help
This enables Nand driver support for Arasan nand flash
controller. This uses the hardware ECC for read and
write operations.
comment "Generic NAND options"
# Enhance depends when converting drivers to Kconfig which use this config
# option (mxc_nand, ndfc, omap_gpmc).
config SYS_NAND_BUSWIDTH_16BIT
bool "Use 16-bit NAND interface"
depends on NAND_VF610_NFC
help
Indicates that NAND device has 16-bit wide data-bus. In absence of this
config, bus-width of NAND device is assumed to be either 8-bit and later
determined by reading ONFI params.
Above config is useful when NAND device's bus-width information cannot
be determined from on-chip ONFI params, like in following scenarios:
- SPL boot does not support reading of ONFI parameters. This is done to
keep SPL code foot-print small.
- In current U-Boot flow using nand_init(), driver initialization
happens in board_nand_init() which is called before any device probe
(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
not available while configuring controller. So a static CONFIG_NAND_xx
is needed to know the device's bus-width in advance.
if SPL
config SYS_NAND_U_BOOT_LOCATIONS
bool "Define U-boot binaries locations in NAND"
help
Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
This option should not be enabled when compiling U-boot for boards
defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
file.
config SYS_NAND_U_BOOT_OFFS
hex "Location in NAND to read U-Boot from"
default 0x8000 if NAND_SUNXI
depends on SYS_NAND_U_BOOT_LOCATIONS
help
Set the offset from the start of the nand where u-boot should be
loaded from.
config SYS_NAND_U_BOOT_OFFS_REDUND
hex "Location in NAND to read U-Boot from"
default SYS_NAND_U_BOOT_OFFS
depends on SYS_NAND_U_BOOT_LOCATIONS
help
Set the offset from the start of the nand where the redundant u-boot
should be loaded from.
config SPL_NAND_DENALI
bool "Support Denali NAND controller for SPL"
help
This is a small implementation of the Denali NAND controller
for use on SPL.
endif
endmenu
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