1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
|
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
#include <misc.h>
#include <reset-uclass.h>
#include <asm/arch-tegra/bpmp_abi.h>
static int tegra186_reset_request(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return 0;
}
static int tegra186_reset_free(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return 0;
}
static int tegra186_reset_common(struct reset_ctl *reset_ctl,
enum mrq_reset_commands cmd)
{
struct mrq_reset_request req;
int ret;
req.cmd = cmd;
req.reset_id = reset_ctl->id;
ret = misc_call(reset_ctl->dev->parent, MRQ_RESET, &req, sizeof(req),
NULL, 0);
if (ret < 0)
return ret;
return 0;
}
static int tegra186_reset_assert(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT);
}
static int tegra186_reset_deassert(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT);
}
struct reset_ops tegra186_reset_ops = {
.request = tegra186_reset_request,
.rfree = tegra186_reset_free,
.rst_assert = tegra186_reset_assert,
.rst_deassert = tegra186_reset_deassert,
};
static int tegra186_reset_probe(struct udevice *dev)
{
debug("%s(dev=%p)\n", __func__, dev);
return 0;
}
U_BOOT_DRIVER(tegra186_reset) = {
.name = "tegra186_reset",
.id = UCLASS_RESET,
.probe = tegra186_reset_probe,
.ops = &tegra186_reset_ops,
};
|
