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/*
*
* Congatec Conga-QEVAl board configuration file.
*
* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
* Based on Freescale i.MX6Q Sabre Lite board configuration file.
* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
* Leo Sartre, <lsartre@adeneo-embedded.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_CGTQMX6EVAL_H
#define __CONFIG_CGTQMX6EVAL_H
#include "mx6_common.h"
#define CONFIG_MACH_TYPE 4122
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* Miscellaneous commands */
#define CONFIG_CMD_BMODE
/* Thermal support */
#define CONFIG_IMX6_THERMAL
#define CONFIG_CMD_FUSE
#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
#define CONFIG_MXC_OCOTP
#endif
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"boot_dir=/boot\0" \
"console=ttymxc1\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_addr=0x18000000\0" \
"boot_fdt=try\0" \
"mmcdev=1\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
"${boot_dir}/${image}\0" \
"loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
"${boot_dir}/${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootz ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootz; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootz; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev};" \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loadimage; then " \
"run mmcboot; " \
"else "\
"echo ERR: Fail to boot from mmc; " \
"fi; " \
"fi; " \
"else echo ERR: Fail to boot from mmc; fi"
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Environment organization */
#define CONFIG_ENV_SIZE (8 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif /* __CONFIG_CGTQMX6EVAL_H */
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