blob: f10cddafe0f293fe3c0e7f96500a47906477453e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
|
/*
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
* Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CONFIG_CONTROLCENTERDC_H
#define _CONFIG_CONTROLCENTERDC_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_CUSTOMER_BOARD_SUPPORT
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_LAST_STAGE_INIT
/*
* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
#define CONFIG_SYS_TEXT_BASE 0x00800000
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
#define CONFIG_LOADADDR 1000000
/*
* Commands configuration
*/
#define CONFIG_CMD_I2C
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SCSI
#define CONFIG_CMD_SPI
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_BUS 1
#define CONFIG_SF_DEFAULT_SPEED 1000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
/*
* SDIO/MMC Card Configuration
*/
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
/*
* SATA/SCSI/AHCI configuration
*/
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
/* Additional FS support/configuration */
#define CONFIG_SUPPORT_VFAT
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
/* Environment in SPI NOR flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_BUS 1
#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
#define CONFIG_PHY_MARVELL /* there is a marvell phy */
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI
#define CONFIG_PCI_MVEBU
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_SYS_ALT_MEMTEST
/*
* Software (bit-bang) MII driver configuration
*/
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
#define CONFIG_BITBANGMII_MULTI
/* SPL */
/*
* Select the boot device here
*
* Currently supported are:
* SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
* SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
*/
#define SPL_BOOT_SPI_NOR_FLASH 1
#define SPL_BOOT_SDIO_MMC_CARD 2
#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_SIZE (160 << 10)
#if defined(CONFIG_SECURED_MODE_IMAGE)
#define CONFIG_SPL_TEXT_BASE 0x40002614
#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
#else
#define CONFIG_SPL_TEXT_BASE 0x40000030
#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
#endif
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif
#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
#endif
/*
* Environment Configuration
*/
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
#define CONFIG_HOSTNAME ccdc
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "ccdc.img"
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth1\0" \
"consoledev=ttyS1\0" \
"u-boot=u-boot.bin\0" \
"bootfile_addr=1000000\0" \
"keyprogram_addr=3000000\0" \
"keyprogram_file=keyprogram.img\0" \
"fdtfile=controlcenterdc.dtb\0" \
"load=tftpboot ${loadaddr} ${u-boot}\0" \
"mmcdev=0:2\0" \
"update=sf probe 1:0;" \
" sf erase 0 +${filesize};" \
" sf write ${fileaddr} 0 ${filesize}\0" \
"upd=run load update\0" \
"fdt_high=0x10000000\0" \
"initrd_high=0x10000000\0" \
"loadkeyprogram=tpm flush_keys;" \
" mmc rescan;" \
" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
" source ${keyprogram_addr}:script@1\0" \
"gpio1=gpio@22_25\0" \
"gpio2=A29\0" \
"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
"2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
"bootfail=for i in ${blinkseq}; do" \
" if test $i -eq 0; then" \
" gpio clear ${gpio1}; gpio set ${gpio2};" \
" elif test $i -eq 1; then" \
" gpio clear ${gpio1}; gpio clear ${gpio2};" \
" elif test $i -eq 2; then" \
" gpio set ${gpio1}; gpio set ${gpio2};" \
" else;" \
" gpio clear ${gpio1}; gpio set ${gpio2};" \
" fi; sleep 0.12; done\0"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
"console=${consoledev},${baudrate} ${othbootargs}; " \
"tftpboot ${bootfile_addr} ${bootfile}; " \
"bootm ${bootfile_addr}"
#define CONFIG_MMCBOOTCOMMAND \
"setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
"console=${consoledev},${baudrate} ${othbootargs}; " \
"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
"bootm ${bootfile_addr}"
#define CONFIG_BOOTCOMMAND \
"if env exists keyprogram; then;" \
" setenv keyprogram; run nfsboot;" \
" fi;" \
" run dobootfail"
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
#include "mv-common.h"
#endif /* _CONFIG_CONTROLCENTERDC_H */
|
