blob: 18ea5a8fb6d79e16ef80961c7991338faee386bd (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2018 NXP
*/
#ifndef __IMX8QXP_MEK_H
#define __IMX8QXP_MEK_H
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_MALLOC_F_ADDR 0x00120000
#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#define CONFIG_OF_EMBED
#endif
#define CONFIG_REMAKE_ELF
#define CONFIG_BOARD_EARLY_INIT_F
/* Flat Device Tree Definitions */
#define CONFIG_OF_BOARD_SETUP
#undef CONFIG_CMD_EXPORTENV
#undef CONFIG_CMD_IMPORTENV
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_CRC32
#undef CONFIG_BOOTM_NETBSD
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000
#define USDHC2_BASE_ADDR 0x5B020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=Image\0" \
"panel=NULL\0" \
"console=ttyLP0,${baudrate} earlycon\0" \
"fdt_addr=0x83000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"boot_fdt=try\0" \
"fdt_file=imx8qxp-mek.dtb\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"booti ${loadaddr} - ${fdt_addr}; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"else " \
"echo wait for boot; " \
"fi;\0" \
"netargs=setenv bootargs console=${console} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
"else " \
"setenv get_cmd tftp; " \
"fi; " \
"${get_cmd} ${loadaddr} ${image}; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
"booti ${loadaddr} - ${fdt_addr}; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"else " \
"booti; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loadimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
#define CONFIG_LOADADDR 0x80280000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
/* Default environment is in SD */
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_ENV_OFFSET (64 * SZ_64K)
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
/* LPDDR4 board total DDR is 3GB */
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#ifndef CONFIG_DM_PCA953X
#define CONFIG_PCA953X
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#endif
/* Networking */
#define CONFIG_FEC_XCV_TYPE RGMII
#define FEC_QUIRK_ENET_MAC
#endif /* __IMX8QXP_MEK_H */
|
