blob: c0b80905cfbe458e974d34fcb19b7f7f3f0a9fd6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <linux/sizes.h>
/* LP0 suspend / resume */
#define CONFIG_TEGRA_LP0
#define CONFIG_TEGRA_PMU
#define CONFIG_TPS6586X_POWER
#define CONFIG_TEGRA_CLOCK_SCALING
#include "tegra20-common.h"
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 2
/* USB Host support */
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */
/* Enable keyboard */
#define CONFIG_TEGRA_KEYBOARD
#define CONFIG_KEYBOARD
/* NAND support */
#define CONFIG_TEGRA_NAND
/* Max number of NAND devices */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
|