diff options
| author | Wolfgang Denk <wd@denx.de> | 2010-05-17 23:16:08 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-05-17 23:16:08 +0200 |
| commit | 568278e336a1aad2019b0ee42837a72776d6cd49 (patch) | |
| tree | edc2a37b7a23d59c831bbc14d5a7e3d8d841f3de | |
| parent | 3707f3b0b5a3af4be41c9dcf791b3338732d8c7c (diff) | |
| parent | b1e1a42bb1ea2f0ddaaea7f4c9d67c98ab38709e (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/start.S | 2 | ||||
| -rw-r--r-- | board/sheldon/simpc8313/simpc8313.c | 2 | ||||
| -rw-r--r-- | include/configs/SIMPC8313.h | 3 |
3 files changed, 5 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index a7c80792de..1b3d618f49 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -739,6 +739,7 @@ setup_bats: * Note: requires that all cache bits in * HID0 are in the low half word. */ +#ifndef CONFIG_NAND_SPL .globl icache_enable icache_enable: mfspr r3, HID0 @@ -767,6 +768,7 @@ icache_status: mfspr r3, HID0 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31 blr +#endif /* !CONFIG_NAND_SPL */ .globl dcache_enable dcache_enable: diff --git a/board/sheldon/simpc8313/simpc8313.c b/board/sheldon/simpc8313/simpc8313.c index 0235545ae4..cb30b48859 100644 --- a/board/sheldon/simpc8313/simpc8313.c +++ b/board/sheldon/simpc8313/simpc8313.c @@ -33,13 +33,13 @@ DECLARE_GLOBAL_DATA_PTR; +#ifndef CONFIG_NAND_SPL int checkboard(void) { puts("Board: Sheldon Instruments SIMPC8313\n"); return 0; } -#ifndef CONFIG_NAND_SPL static struct pci_region pci_regions[] = { { bus_start: CONFIG_SYS_PCI1_MEM_BASE, diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 1a17323a51..9104f1ad36 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -418,7 +418,8 @@ | SICRH_ETSEC2_G \ | SICRH_TSOBI1 \ | SICRH_TSOBI2 ) -#define CONFIG_SYS_SICRL (SICRL_USBDR \ +#define CONFIG_SYS_SICRL ( SICRL_LBC \ + | SICRL_USBDR \ | SICRL_ETSEC2_A ) #define CONFIG_SYS_HID0_INIT 0x000000000 |