diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2016-06-07 10:54:25 +0800 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2016-06-20 22:43:59 +0200 |
| commit | 778dc5f43e92d8736a81e15fb0bbb6cb5a78c1ab (patch) | |
| tree | 9b8142a2adaaf04f97476ec5d337e6272b8a57af | |
| parent | dae08d228122e4ad296077106520a4db3ca17872 (diff) | |
ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_all
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| -rw-r--r-- | arch/arm/cpu/armv7/psci.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index cdd001fe3f..ab408378fc 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -110,6 +110,7 @@ ENDPROC(psci_get_cpu_id) /* Imported from Linux kernel */ LENTRY(v7_flush_dcache_all) + stmfd sp!, {r4-r5, r7, r9-r11, lr} dmb @ ensure ordering with previous memory accesses mrc p15, 1, r0, c0, c0, 1 @ read clidr ands r3, r0, #0x7000000 @ extract loc from clidr @@ -153,6 +154,7 @@ finished: mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr dsb st isb + ldmfd sp!, {r4-r5, r7, r9-r11, lr} bx lr ENDPROC(v7_flush_dcache_all) |