diff options
| author | Alexey Brodkin <abrodkin@synopsys.com> | 2016-11-25 16:23:43 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2017-06-29 19:34:10 +0300 |
| commit | 67482f57e6127d7d3e216dae6860dac7b33132d5 (patch) | |
| tree | 011454261249ba6989bd84ed78055211d8c40309 /arch/arc/dts | |
| parent | 97a63144a906827ad7e3c4ef18d641c2765b1ebc (diff) | |
arc: Add support for HS Development Kit board
ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
* Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
* 4Gb of DDR (we use only lowest 1Gb out of it now)
* Lots of DesigWare peripherals
* Different connectivity modules:
- Synopsys HAPS HT3
- Arduino-compatible connector
- MikroBUS
This initial commit supports the following peripherals:
* UART (DW 8250)
* Ethernet (DW GMAC)
* SD/MMC (DW Mobile Storage)
* USB 1.1 & 2.0
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc/dts')
| -rw-r--r-- | arch/arc/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arc/dts/hsdk.dts | 50 |
2 files changed, 51 insertions, 0 deletions
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index 218a6475dd..63a6694712 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -6,6 +6,7 @@ dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb +dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb targets += $(dtb-y) diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts new file mode 100644 index 0000000000..a7b276c01e --- /dev/null +++ b/arch/arc/dts/hsdk.dts @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; + +#include "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &uart0; + }; + + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <1000000000>; + u-boot,dm-pre-reloc; + }; + }; + + uart0: serial0@f0005000 { + compatible = "snps,dw-apb-uart"; + reg = <0xf0005000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + ethernet@f0008000 { + #interrupt-cells = <1>; + compatible = "altr,socfpga-stmmac"; + reg = <0xf0008000 0x2000>; + phy-mode = "gmii"; + }; + + ehci@0xf0040000 { + compatible = "generic-ehci"; + reg = <0xf0040000 0x100>; + }; + + ohci@0xf0060000 { + compatible = "generic-ohci"; + reg = <0xf0060000 0x100>; + }; +}; |