diff options
Diffstat (limited to 'arch/arc/dts')
| -rw-r--r-- | arch/arc/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arc/dts/hsdk.dts | 50 |
2 files changed, 51 insertions, 0 deletions
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index 218a6475dd..63a6694712 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -6,6 +6,7 @@ dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb +dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb targets += $(dtb-y) diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts new file mode 100644 index 0000000000..a7b276c01e --- /dev/null +++ b/arch/arc/dts/hsdk.dts @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; + +#include "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &uart0; + }; + + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <1000000000>; + u-boot,dm-pre-reloc; + }; + }; + + uart0: serial0@f0005000 { + compatible = "snps,dw-apb-uart"; + reg = <0xf0005000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + ethernet@f0008000 { + #interrupt-cells = <1>; + compatible = "altr,socfpga-stmmac"; + reg = <0xf0008000 0x2000>; + phy-mode = "gmii"; + }; + + ehci@0xf0040000 { + compatible = "generic-ehci"; + reg = <0xf0040000 0x100>; + }; + + ohci@0xf0060000 { + compatible = "generic-ohci"; + reg = <0xf0060000 0x100>; + }; +}; |