summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/arm720t
diff options
context:
space:
mode:
authorTom Rini <trini@ti.com>2012-10-26 15:44:31 -0700
committerTom Rini <trini@ti.com>2012-10-26 15:44:31 -0700
commit5bb3505fa867ded03cbee83f7722ab5182930637 (patch)
tree1830ce86f88d280eb1a004d3f954f684c548cdce /arch/arm/cpu/arm720t
parent8440f18a4818d52ba51bb9f0b07ce6439f1b6a57 (diff)
parentb68d6712c379735e886ef9c01b946bc36f295273 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/cpu/arm720t')
-rw-r--r--arch/arm/cpu/arm720t/cpu.c32
-rw-r--r--arch/arm/cpu/arm720t/interrupts.c249
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/Makefile50
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/flash.c249
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/iap_entry.S7
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/mmc.c131
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/mmc_hw.c233
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/mmc_hw.h29
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/spi.c40
-rw-r--r--arch/arm/cpu/arm720t/s3c4510b/Makefile45
-rw-r--r--arch/arm/cpu/arm720t/s3c4510b/cache.c86
-rw-r--r--arch/arm/cpu/arm720t/start.S185
12 files changed, 8 insertions, 1328 deletions
diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
index ce7b3c9c24..820614e0ea 100644
--- a/arch/arm/cpu/arm720t/cpu.c
+++ b/arch/arm/cpu/arm720t/cpu.c
@@ -27,34 +27,12 @@
*/
/*
- * CPU specific code
+ * cleanup_before_linux() - Prepare the CPU to jump to Linux
+ *
+ * This function is called just before we call Linux, it
+ * prepares the processor for linux
*/
-
-#include <common.h>
-#include <command.h>
-#include <clps7111.h>
-#include <asm/hardware.h>
-#include <asm/system.h>
-
-int cleanup_before_linux (void)
+int cleanup_before_linux(void)
{
- /*
- * this function is called just before we call linux
- * it prepares the processor for linux
- *
- * we turn off caches etc ...
- * and we set the CPU-speed to 73 MHz - see start.S for details
- */
-
-#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
- disable_interrupts ();
- /* Nothing more needed */
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
- /* No cleanup before linux for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_TEGRA)
- /* No cleanup before linux for tegra as yet */
-#else
-#error No cleanup_before_linux() defined for this CPU type
-#endif
return 0;
}
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index c2f898f2cc..8e763b7788 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -26,267 +26,22 @@
* MA 02111-1307 USA
*/
-#include <common.h>
-#include <clps7111.h>
-#include <asm/proc-armv/ptrace.h>
-#include <asm/hardware.h>
-
-#ifndef CONFIG_NETARM
-/* we always count down the max. */
-#define TIMER_LOAD_VAL 0xffff
-/* macro to read the 16 bit timer */
-#define READ_TIMER (IO_TC1D & 0xffff)
-
-#ifdef CONFIG_LPC2292
-#undef READ_TIMER
-#define READ_TIMER (0xFFFFFFFF - GET32(T0TC))
-#endif
-
-#else
-#define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
-#define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
-#define TM2STAT (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_STATUS))
-#define TIMER_LOAD_VAL NETARM_GEN_TSTAT_CTC_MASK
-#define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
-#endif
-
-#ifdef CONFIG_S3C4510B
-/* require interrupts for the S3C4510B */
-# ifndef CONFIG_USE_IRQ
-# error CONFIG_USE_IRQ _must_ be defined when using CONFIG_S3C4510B
-# else
-static struct _irq_handler IRQ_HANDLER[N_IRQS];
-# endif
-#endif /* CONFIG_S3C4510B */
-
#ifdef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
-#if defined(CONFIG_S3C4510B)
- unsigned int pending;
-
- while ( (pending = GET_REG( REG_INTOFFSET)) != 0x54) { /* sentinal value for no pending interrutps */
- IRQ_HANDLER[pending>>2].m_func( IRQ_HANDLER[pending>>2].m_data);
-
- /* clear pending interrupt */
- PUT_REG( REG_INTPEND, (1<<(pending>>2)));
- }
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
- /* No do_irq() for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_LPC2292)
-
- void (*pfnct)(void);
-
- pfnct = (void (*)(void))VICVectAddr;
-
- (*pfnct)();
-#else
-#error do_irq() not defined for this CPU type
-#endif
-}
-#endif
-
-#ifdef CONFIG_S3C4510B
-static void default_isr( void *data) {
- printf ("default_isr(): called for IRQ %d\n", (int)data);
-}
-
-static void timer_isr( void *data) {
- unsigned int *pTime = (unsigned int *)data;
-
- (*pTime)++;
- if ( !(*pTime % (CONFIG_SYS_HZ/4))) {
- /* toggle LED 0 */
- PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
- }
-
}
#endif
-#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
- /* Use IntegratorAP routines in board/integratorap.c */
-#else
-
+#if defined(CONFIG_TEGRA)
static ulong timestamp;
static ulong lastdec;
-#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B)
-int arch_interrupt_init (void)
-{
- int i;
-
- /* install default interrupt handlers */
- for ( i = 0; i < N_IRQS; i++) {
- IRQ_HANDLER[i].m_data = (void *)i;
- IRQ_HANDLER[i].m_func = default_isr;
- }
-
- /* configure interrupts for IRQ mode */
- PUT_REG( REG_INTMODE, 0x0);
- /* clear any pending interrupts */
- PUT_REG( REG_INTPEND, 0x1FFFFF);
-
- lastdec = 0;
-
- /* install interrupt handler for timer */
- IRQ_HANDLER[INT_TIMER0].m_data = (void *)&timestamp;
- IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
-
- return 0;
-}
-#endif
-
int timer_init (void)
{
-#if defined(CONFIG_NETARM)
- /* disable all interrupts */
- IRQEN = 0;
-
- /* operate timer 2 in non-prescale mode */
- TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) |
- NETARM_GEN_TCTL_ENABLE |
- NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL));
-
- /* set timer 2 counter */
- lastdec = TIMER_LOAD_VAL;
-#elif defined(CONFIG_S3C4510B)
- /* configure free running timer 0 */
- PUT_REG( REG_TMOD, 0x0);
- /* Stop timer 0 */
- CLR_REG( REG_TMOD, TM0_RUN);
-
- /* Configure for interval mode */
- CLR_REG( REG_TMOD, TM1_TOGGLE);
-
- /*
- * Load Timer data register with count down value.
- * count_down_val = CONFIG_SYS_SYS_CLK_FREQ/CONFIG_SYS_HZ
- */
- PUT_REG( REG_TDATA0, (CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ));
-
- /*
- * Enable global interrupt
- * Enable timer0 interrupt
- */
- CLR_REG( REG_INTMASK, ((1<<INT_GLOBAL) | (1<<INT_TIMER0)));
-
- /* Start timer */
- SET_REG( REG_TMOD, TM0_RUN);
-#elif defined(CONFIG_LPC2292)
- PUT32(T0IR, 0); /* disable all timer0 interrupts */
- PUT32(T0TCR, 0); /* disable timer0 */
- PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ);
- PUT32(T0MCR, 0);
- PUT32(T0TC, 0);
- PUT32(T0TCR, 1); /* enable timer0 */
-
-#elif defined(CONFIG_TEGRA)
/* No timer routines for tegra as yet */
lastdec = 0;
-#else
-#error No timer_init() defined for this CPU type
-#endif
timestamp = 0;
- return (0);
-}
-
-#endif /* ! IntegratorAP */
-
-/*
- * timer without interrupts
- */
-
-
-#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
-
-ulong get_timer (ulong base)
-{
- return get_timer_masked () - base;
-}
-
-void __udelay (unsigned long usec)
-{
- ulong tmo;
-
- tmo = usec / 1000;
- tmo *= CONFIG_SYS_HZ;
- tmo /= 1000;
-
- tmo += get_timer (0);
-
- while (get_timer_masked () < tmo)
-#ifdef CONFIG_LPC2292
- /* GJ - not sure whether this is really needed or a misunderstanding */
- __asm__ __volatile__(" nop");
-#else
- /*NOP*/;
-#endif
-}
-
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER;
-
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
- } else {
- /* we have an overflow ... */
- timestamp += lastdec + TIMER_LOAD_VAL - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-void udelay_masked (unsigned long usec)
-{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) {
- tmo = usec / 1000;
- tmo *= CONFIG_SYS_HZ;
- tmo /= 1000;
- } else {
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*1000);
- }
-
- endtime = get_timer_masked () + tmo;
-
- do {
- ulong now = get_timer_masked ();
- diff = endtime - now;
- } while (diff >= 0);
-}
-
-#elif defined(CONFIG_S3C4510B)
-
-ulong get_timer (ulong base)
-{
- return timestamp - base;
-}
-
-void __udelay (unsigned long usec)
-{
- u32 ticks;
-
- ticks = (usec * CONFIG_SYS_HZ) / 1000000;
-
- ticks += get_timer (0);
-
- while (get_timer (0) < ticks)
- /*NOP*/;
-
+ return 0;
}
-
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
- /* No timer routines for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_TEGRA)
- /* No timer routines for tegra as yet */
-#else
-#error Timer routines not defined for this CPU type
#endif
diff --git a/arch/arm/cpu/arm720t/lpc2292/Makefile b/arch/arm/cpu/arm720t/lpc2292/Makefile
deleted file mode 100644
index 1b93008685..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2000-2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = flash.o mmc.o mmc_hw.o spi.o
-SOBJS = $(obj)iap_entry.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-# this MUST be compiled as thumb code!
-$(SOBJS):
- $(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/arch/arm/cpu/arm720t/lpc2292/flash.c b/arch/arm/cpu/arm720t/lpc2292/flash.c
deleted file mode 100644
index 3d2dc32231..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/flash.c
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
- *
- * Modified to remove all but the IAP-command related code by
- * Gary Jennejohn <garyj@denx.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-
-/* IAP commands use 32 bytes at the top of CPU internal sram, we
- use 512 bytes below that */
-#define COPY_BUFFER_LOCATION 0x40003de0
-
-#define IAP_LOCATION 0x7ffffff1
-#define IAP_CMD_PREPARE 50
-#define IAP_CMD_COPY 51
-#define IAP_CMD_ERASE 52
-#define IAP_CMD_CHECK 53
-#define IAP_CMD_ID 54
-#define IAP_CMD_VERSION 55
-#define IAP_CMD_COMPARE 56
-
-#define IAP_RET_CMD_SUCCESS 0
-
-static unsigned long command[5];
-static unsigned long result[2];
-
-extern void iap_entry(unsigned long * command, unsigned long * result);
-
-/*-----------------------------------------------------------------------
- *
- */
-static int get_flash_sector(flash_info_t * info, ulong flash_addr)
-{
- int i;
-
- for(i = 1; i < (info->sector_count); i++) {
- if (flash_addr < (info->start[i]))
- break;
- }
-
- return (i-1);
-}
-
-/*-----------------------------------------------------------------------
- * This function assumes that flash_addr is aligned on 512 bytes boundary
- * in flash. This function also assumes that prepare have been called
- * for the sector in question.
- */
-int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
-{
- int first_sector;
- int last_sector;
-
- first_sector = get_flash_sector(info, flash_addr);
- last_sector = get_flash_sector(info, flash_addr + 512 - 1);
-
- /* prepare sectors for write */
- command[0] = IAP_CMD_PREPARE;
- command[1] = first_sector;
- command[2] = last_sector;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP prepare failed\n");
- return ERR_PROG_ERROR;
- }
-
- command[0] = IAP_CMD_COPY;
- command[1] = flash_addr;
- command[2] = COPY_BUFFER_LOCATION;
- command[3] = 512;
- command[4] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP copy failed\n");
- return 1;
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag;
- int prot;
- int sect;
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
-
- flag = disable_interrupts();
-
- printf ("Erasing %d sectors starting at sector %2d.\n"
- "This make take some time ... ",
- s_last - s_first + 1, s_first);
-
- command[0] = IAP_CMD_PREPARE;
- command[1] = s_first;
- command[2] = s_last;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP prepare failed\n");
- return ERR_PROTECTED;
- }
-
- command[0] = IAP_CMD_ERASE;
- command[1] = s_first;
- command[2] = s_last;
- command[3] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP erase failed\n");
- return ERR_PROTECTED;
- }
-
- if (flag)
- enable_interrupts();
-
- return ERR_OK;
-}
-
-int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr,
- ulong cnt)
-{
- int first_copy_size;
- int last_copy_size;
- int first_block;
- int last_block;
- int nbr_mid_blocks;
- uchar memmap_value;
- ulong i;
- uchar* src_org;
- uchar* dst_org;
- int ret = ERR_OK;
-
- src_org = src;
- dst_org = (uchar*)addr;
-
- first_block = addr / 512;
- last_block = (addr + cnt) / 512;
- nbr_mid_blocks = last_block - first_block - 1;
-
- first_copy_size = 512 - (addr % 512);
- last_copy_size = (addr + cnt) % 512;
-
- debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
- "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
- (ulong)(first_block * 512),
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)src,
- (ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
- first_copy_size,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)(first_block * 512));
-
- /* copy first block */
- memcpy((void*)COPY_BUFFER_LOCATION,
- (void*)(first_block * 512), 512);
- memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
- src, first_copy_size);
- lpc2292_copy_buffer_to_flash(info, first_block * 512);
- src += first_copy_size;
- addr += first_copy_size;
-
- /* copy middle blocks */
- for (i = 0; i < nbr_mid_blocks; i++) {
- debug("copy middle block: %lX -> %lX 512 bytes, "
- "%lX -> %lX 512 bytes\n",
- (ulong)src,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)addr);
-
- memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
- lpc2292_copy_buffer_to_flash(info, addr);
- src += 512;
- addr += 512;
- }
-
-
- if (last_copy_size > 0) {
- debug("copy last block: (1) %lX -> %lX 0x200 bytes, "
- "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
- (ulong)(last_block * 512),
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)src,
- (ulong)(COPY_BUFFER_LOCATION),
- last_copy_size,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)addr);
-
- /* copy last block */
- memcpy((void*)COPY_BUFFER_LOCATION,
- (void*)(last_block * 512), 512);
- memcpy((void*)COPY_BUFFER_LOCATION,
- src, last_copy_size);
- lpc2292_copy_buffer_to_flash(info, addr);
- }
-
- /* verify write */
- memmap_value = GET8(MEMMAP);
-
- disable_interrupts();
-
- PUT8(MEMMAP, 01); /* we must make sure that initial 64
- bytes are taken from flash when we
- do the compare */
-
- for (i = 0; i < cnt; i++) {
- if (*dst_org != *src_org){
- printf("Write failed. Byte %lX differs\n", i);
- ret = ERR_PROG_ERROR;
- break;
- }
- dst_org++;
- src_org++;
- }
-
- PUT8(MEMMAP, memmap_value);
- enable_interrupts();
-
- return ret;
-}
diff --git a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
deleted file mode 100644
index c31d5190bd..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
+++ /dev/null
@@ -1,7 +0,0 @@
-IAP_ADDRESS: .word 0x7FFFFFF1
-
-.globl iap_entry
-iap_entry:
- ldr r2, IAP_ADDRESS
- bx r2
- mov pc, lr
diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc.c b/arch/arm/cpu/arm720t/lpc2292/mmc.c
deleted file mode 100644
index beaffe944c..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/mmc.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <mmc.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include <part.h>
-#include <fat.h>
-#include "mmc_hw.h"
-#include <asm/arch/spi.h>
-
-#ifdef CONFIG_MMC
-
-#undef MMC_DEBUG
-
-static block_dev_desc_t mmc_dev;
-
-/* these are filled out by a call to mmc_hw_get_parameters */
-static int hw_size; /* in kbytes */
-static int hw_nr_sects;
-static int hw_sect_size; /* in bytes */
-
-block_dev_desc_t * mmc_get_dev(int dev)
-{
- return (block_dev_desc_t *)(&mmc_dev);
-}
-
-unsigned long mmc_block_read(int dev,
- unsigned long start,
- lbaint_t blkcnt,
- void *buffer)
-{
- unsigned long rc = 0;
- unsigned char *p = (unsigned char *)buffer;
- unsigned long i;
- unsigned long addr = start;
-
-#ifdef MMC_DEBUG
- printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
- (unsigned long)blkcnt);
-#endif
-
- for(i = 0; i < (unsigned long)blkcnt; i++) {
-#ifdef MMC_DEBUG
- printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
-#endif
- (void)mmc_read_sector(addr, p);
- rc++;
- addr++;
- p += hw_sect_size;
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------------
- * Read hardware paramterers (sector size, size, number of sectors)
- */
-static int mmc_hw_get_parameters(void)
-{
- unsigned char csddata[16];
- unsigned int sizemult;
- unsigned int size;
-
- mmc_read_csd(csddata);
- hw_sect_size = 1<<(csddata[5] & 0x0f);
- size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
- sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
- hw_nr_sects = (size+1)*(1<<(sizemult+2));
- hw_size = hw_nr_sects*hw_sect_size/1024;
-
-#ifdef MMC_DEBUG
- printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
- "hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
-#endif
-
- return 0;
-}
-
-int mmc_legacy_init(int verbose)
-{
- int ret = -ENODEV;
-
- if (verbose)
- printf("mmc_legacy_init\n");
-
- spi_init();
- /* this meeds to be done twice */
- mmc_hw_init();
- udelay(1000);
- mmc_hw_init();
-
- mmc_hw_get_parameters();
-
- mmc_dev.if_type = IF_TYPE_MMC;
- mmc_dev.part_type = PART_TYPE_DOS;
- mmc_dev.dev = 0;
- mmc_dev.lun = 0;
- mmc_dev.type = 0;
- mmc_dev.blksz = hw_sect_size;
- mmc_dev.lba = hw_nr_sects;
- sprintf((char*)mmc_dev.vendor, "Unknown vendor");
- sprintf((char*)mmc_dev.product, "Unknown product");
- sprintf((char*)mmc_dev.revision, "N/A");
- mmc_dev.removable = 0; /* should be true??? */
- mmc_dev.block_read = mmc_block_read;
-
- fat_register_device(&mmc_dev, 1);
-
- ret = 0;
-
- return ret;
-}
-
-#endif /* CONFIG_MMC */
diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c
deleted file mode 100644
index bd6a5b1206..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- This code was original written by Ulrich Radig and modified by
- Embedded Artists AB (www.embeddedartists.com).
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <config.h>
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/spi.h>
-
-#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
-#define MMC_Disable() PUT32(IO1SET, 1l << 22)
-#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
-
-static unsigned char Write_Command_MMC (unsigned char *CMD);
-static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
- unsigned short int Bytes);
-
-/* initialize the hardware */
-int mmc_hw_init(void)
-{
- unsigned long a;
- unsigned short int Timeout = 0;
- unsigned char b;
- unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
-
- /* set-up GPIO and SPI */
- (*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
- (*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
-
- MMC_Disable();
-
- spi_lock();
- spi_set_clock(248);
- spi_set_cfg(0, 1, 0);
- MMC_Enable();
-
- /* waste some time */
- for(a=0; a < 20000; a++)
- asm("nop");
-
- /* Put the MMC/SD-card into SPI-mode */
- for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
- spi_write(0xff);
-
- /* Sends command CMD0 to MMC/SD-card */
- while (Write_Command_MMC(CMD) != 1) {
- if (Timeout++ > 200) {
- MMC_Disable();
- spi_unlock();
- return(1); /* Abort with command 1 (return 1) */
- }
- }
- /* Sends Command CMD1 an MMC/SD-card */
- Timeout = 0;
- CMD[0] = 0x41;/* Command 1 */
- CMD[5] = 0xFF;
-
- while (Write_Command_MMC(CMD) != 0) {
- if (Timeout++ > 200) {
- MMC_Disable();
- spi_unlock();
- return (2); /* Abort with command 2 (return 2) */
- }
- }
-
- MMC_Disable();
- spi_unlock();
-
- return 0;
-}
-
-/* ############################################################################
- Sends a command to the MMC/SD-card
- ######################################################################### */
-static unsigned char Write_Command_MMC (unsigned char *CMD)
-{
- unsigned char a, tmp = 0xff;
- unsigned short int Timeout = 0;
-
- MMC_Disable();
- spi_write(0xFF);
- MMC_Enable();
-
- for (a = 0; a < 0x06; a++)
- spi_write(*CMD++);
-
- while (tmp == 0xff) {
- tmp = spi_read();
- if (Timeout++ > 5000)
- break;
- }
-
- return (tmp);
-}
-
-/* ############################################################################
- Routine to read the CID register from the MMC/SD-card (16 bytes)
- ######################################################################### */
-void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
- int Bytes)
-{
- unsigned short int a;
-
- spi_lock();
- mmc_spi_cfg();
- MMC_Enable();
-
- if (Write_Command_MMC(CMD) != 0) {
- MMC_Disable();
- spi_unlock();
- return;
- }
-
- while (spi_read() != 0xfe) {};
- for (a = 0; a < Bytes; a++)
- *Buffer++ = spi_read();
-
- /* Read the CRC-byte */
- spi_read(); /* CRC - byte is discarded */
- spi_read(); /* CRC - byte is discarded */
- /* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
- MMC_Disable();
- spi_unlock();
-
- return;
-}
-
-/* ############################################################################
- Routine to read a block (512 bytes) from the MMC/SD-card
- ######################################################################### */
-unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
-{
- /* Command 16 to read aBlocks from the MMC/SD - caed */
- unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
-
- /* The address on the MMC/SD-card is in bytes,
- addr is transformed from blocks to bytes and the result is
- placed into the command */
-
- addr = addr << 9; /* addr = addr * 512 */
-
- CMD[1] = ((addr & 0xFF000000) >> 24);
- CMD[2] = ((addr & 0x00FF0000) >> 16);
- CMD[3] = ((addr & 0x0000FF00) >> 8 );
-
- MMC_Read_Block(CMD, Buffer, 512);
-
- return (0);
-}
-
-/* ############################################################################
- Routine to write a block (512 byte) to the MMC/SD-card
- ######################################################################### */
-unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
-{
- unsigned char tmp, a;
- unsigned short int b;
- /* Command 24 to write a block to the MMC/SD - card */
- unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
-
- /* The address on the MMC/SD-card is in bytes,
- addr is transformed from blocks to bytes and the result is
- placed into the command */
-
- addr = addr << 9; /* addr = addr * 512 */
-
- CMD[1] = ((addr & 0xFF000000) >> 24);
- CMD[2] = ((addr & 0x00FF0000) >> 16);
- CMD[3] = ((addr & 0x0000FF00) >> 8 );
-
- spi_lock();
- mmc_spi_cfg();
- MMC_Enable();
-
- /* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
- tmp = Write_Command_MMC(CMD);
- if (tmp != 0) {
- MMC_Disable();
- spi_unlock();
- return(tmp);
- }
-
- /* Do a short delay and send a clock-pulse to the MMC/SD-card */
- for (a = 0; a < 100; a++)
- spi_read();
-
- /* Send a start byte to the MMC/SD-card */
- spi_write(0xFE);
-
- /* Write the block (512 bytes) to the MMC/SD-card */
- for (b = 0; b < 512; b++)
- spi_write(*Buffer++);
-
- /* write the CRC-Byte */
- spi_write(0xFF); /* write a dummy CRC */
- spi_write(0xFF); /* CRC code is not used */
-
- /* Wait for MMC/SD-card busy */
- while (spi_read() != 0xff) {};
-
- /* set MMC_Chip_Select to high (MMC/SD-card inactive) */
- MMC_Disable();
- spi_unlock();
- return (0);
-}
-
-/* #########################################################################
- Routine to read the CSD register from the MMC/SD-card (16 bytes)
- ######################################################################### */
-unsigned char mmc_read_csd (unsigned char *Buffer)
-{
- /* Command to read the CSD register */
- unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
-
- MMC_Read_Block(CMD, Buffer, 16);
-
- return (0);
-}
diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h
deleted file mode 100644
index 3687dbf696..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- This module implements a linux character device driver for the 24c256 chip.
- Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#ifndef _MMC_HW_
-#define _MMC_HW_
-
-unsigned char mmc_read_csd(unsigned char *Buffer);
-unsigned char mmc_read_sector (unsigned long addr,
- unsigned char *Buffer);
-unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer);
-int mmc_hw_init(void);
-
-#endif /* _MMC_HW_ */
diff --git a/arch/arm/cpu/arm720t/lpc2292/spi.c b/arch/arm/cpu/arm720t/lpc2292/spi.c
deleted file mode 100644
index d296bdac68..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/spi.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- This module implements an interface to the SPI on the lpc22xx.
- Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <config.h>
-#include <common.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/spi.h>
-
-unsigned long spi_flags;
-unsigned char spi_idle = 0x00;
-
-int spi_init(void)
-{
- unsigned long pinsel0_value;
-
- /* activate spi pins */
- pinsel0_value = GET32(PINSEL0);
- pinsel0_value &= ~(0xFFl << 8);
- pinsel0_value |= (0x55l << 8);
- PUT32(PINSEL0, pinsel0_value);
-
- return 0;
-}
diff --git a/arch/arm/cpu/arm720t/s3c4510b/Makefile b/arch/arm/cpu/arm720t/s3c4510b/Makefile
deleted file mode 100644
index 5c6df08b1a..0000000000
--- a/arch/arm/cpu/arm720t/s3c4510b/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# (C) Copyright 2000-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y += cache.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/arch/arm/cpu/arm720t/s3c4510b/cache.c b/arch/arm/cpu/arm720t/s3c4510b/cache.c
deleted file mode 100644
index 104d287b26..0000000000
--- a/arch/arm/cpu/arm720t/s3c4510b/cache.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/hardware.h>
-
-void icache_enable (void)
-{
- s32 i;
-
- /* disable all cache bits */
- CLR_REG( REG_SYSCFG, 0x3F);
-
- /* 8KB cache, write enable */
- SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01);
-
- /* clear TAG RAM bits */
- for ( i = 0; i < 256; i++)
- PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000);
-
- /* clear SET0 RAM */
- for(i=0; i < 1024; i++)
- PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000);
-
- /* clear SET1 RAM */
- for(i=0; i < 1024; i++)
- PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000);
-
- /* enable cache */
- SET_REG( REG_SYSCFG, CACHE_ENABLE);
-
-}
-
-void icache_disable (void)
-{
- /* disable all cache bits */
- CLR_REG( REG_SYSCFG, 0x3F);
-}
-
-int icache_status (void)
-{
- return GET_REG( REG_SYSCFG) & CACHE_ENABLE;
-}
-
-void dcache_enable (void)
-{
- /* we don't have seperate instruction/data caches */
- icache_enable();
-}
-
-void dcache_disable (void)
-{
- /* we don't have seperate instruction/data caches */
- icache_disable();
-}
-
-int dcache_status (void)
-{
- /* we don't have seperate instruction/data caches */
- return icache_status();
-}
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 2f914e9b4e..c2a7763fff 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -43,11 +43,7 @@ _start: b reset
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
-#ifdef CONFIG_LPC2292
- .word 0xB4405F76 /* 2's complement of the checksum of the vectors */
-#else
ldr pc, _not_used
-#endif
ldr pc, _irq
ldr pc, _fiq
@@ -151,10 +147,6 @@ reset:
bl cpu_init_crit
#endif
-#ifdef CONFIG_LPC2292
- bl lowlevel_init
-#endif
-
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
@@ -291,148 +283,9 @@ _dynsym_start_ofs:
*************************************************************************
*/
-#if defined(CONFIG_LPC2292)
-PLLCFG_ADR: .word PLLCFG
-PLLFEED_ADR: .word PLLFEED
-PLLCON_ADR: .word PLLCON
-PLLSTAT_ADR: .word PLLSTAT
-VPBDIV_ADR: .word VPBDIV
-MEMMAP_ADR: .word MEMMAP
-
-#endif
-
cpu_init_crit:
-#if defined(CONFIG_NETARM)
- /*
- * prior to software reset : need to set pin PORTC4 to be *HRESET
- */
- ldr r0, =NETARM_GEN_MODULE_BASE
- ldr r1, =(NETARM_GEN_PORT_MODE(0x10) | \
- NETARM_GEN_PORT_DIR(0x10))
- str r1, [r0, #+NETARM_GEN_PORTC]
- /*
- * software reset : see HW Ref. Guide 8.2.4 : Software Service register
- * for an explanation of this process
- */
- ldr r0, =NETARM_GEN_MODULE_BASE
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- /*
- * setup PLL and System Config
- */
- ldr r0, =NETARM_GEN_MODULE_BASE
-
- ldr r1, =( NETARM_GEN_SYS_CFG_LENDIAN | \
- NETARM_GEN_SYS_CFG_BUSFULL | \
- NETARM_GEN_SYS_CFG_USER_EN | \
- NETARM_GEN_SYS_CFG_ALIGN_ABORT | \
- NETARM_GEN_SYS_CFG_BUSARB_INT | \
- NETARM_GEN_SYS_CFG_BUSMON_EN )
-
- str r1, [r0, #+NETARM_GEN_SYSTEM_CONTROL]
-
-#ifndef CONFIG_NETARM_PLL_BYPASS
- ldr r1, =( NETARM_GEN_PLL_CTL_PLLCNT(NETARM_PLL_COUNT_VAL) | \
- NETARM_GEN_PLL_CTL_POLTST_DEF | \
- NETARM_GEN_PLL_CTL_INDIV(1) | \
- NETARM_GEN_PLL_CTL_ICP_DEF | \
- NETARM_GEN_PLL_CTL_OUTDIV(2) )
- str r1, [r0, #+NETARM_GEN_PLL_CONTROL]
-#endif
-
- /*
- * mask all IRQs by clearing all bits in the INTMRs
- */
- mov r1, #0
- ldr r0, =NETARM_GEN_MODULE_BASE
- str r1, [r0, #+NETARM_GEN_INTR_ENABLE]
-
-#elif defined(CONFIG_S3C4510B)
- /*
- * Mask off all IRQ sources
- */
- ldr r1, =REG_INTMASK
- ldr r0, =0x3FFFFF
- str r0, [r1]
-
- /*
- * Disable Cache
- */
- ldr r0, =REG_SYSCFG
- ldr r1, =0x83ffffa0 /* cache-disabled */
- str r1, [r0]
-
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
- /* No specific initialisation for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_LPC2292)
- /* Set-up PLL */
- mov r3, #0xAA
- mov r4, #0x55
- /* First disconnect and disable the PLL */
- ldr r0, PLLCON_ADR
- mov r1, #0x00
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Set new M and P values */
- ldr r0, PLLCFG_ADR
- mov r1, #0x23 /* M=4 and P=2 */
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Then enable the PLL */
- ldr r0, PLLCON_ADR
- mov r1, #0x01 /* PLL enable bit */
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Wait for the lock */
- ldr r0, PLLSTAT_ADR
- mov r1, #0x400 /* lock bit */
-lock_loop:
- ldr r2, [r0]
- and r2, r1, r2
- cmp r2, #0
- beq lock_loop
- /* And finally connect the PLL */
- ldr r0, PLLCON_ADR
- mov r1, #0x03 /* PLL enable bit and connect bit */
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Set-up VPBDIV register */
- ldr r0, VPBDIV_ADR
- mov r1, #0x01 /* VPB clock is same as process clock */
- str r1, [r0]
-#elif defined(CONFIG_TEGRA)
- /* No cpu_init_crit for tegra as yet */
-#else
-#error No cpu_init_crit() defined for current CPU type
-#endif
-
-#ifdef CONFIG_ARM7_REVD
- /* set clock speed */
- /* !!! we run @ 36 MHz due to a hardware flaw in Rev. D processors */
- /* !!! not doing DRAM refresh properly! */
- ldr r0, SYSCON3
- ldr r1, [r0]
- bic r1, r1, #CLKCTL
- orr r1, r1, #CLKCTL_36
- str r1, [r0]
-#endif
-
-#if !defined(CONFIG_LPC2292) && !defined(CONFIG_TEGRA)
+#if !defined(CONFIG_TEGRA)
mov ip, lr
/*
* before relocating, we have to setup RAM timing
@@ -610,39 +463,3 @@ fiq:
#endif
#endif /* CONFIG_SPL_BUILD */
-
-#if defined(CONFIG_NETARM)
- .align 5
-.globl reset_cpu
-reset_cpu:
- ldr r1, =NETARM_MEM_MODULE_BASE
- ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
- ldr r1, =0xFFFFF000
- and r0, r1, r0
- ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE)
- add r0, r1, r0
- ldr r4, =NETARM_GEN_MODULE_BASE
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- mov pc, r0
-#elif defined(CONFIG_S3C4510B)
-/* Nothing done here as reseting the CPU is board specific, depending
- * on external peripherals such as watchdog timers, etc. */
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
- /* No specific reset actions for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_LPC2292)
- .align 5
-.globl reset_cpu
-reset_cpu:
- mov pc, r0
-#elif defined(CONFIG_TEGRA)
- /* No specific reset actions for tegra as yet */
-#else
-#error No reset_cpu() defined for current CPU type
-#endif