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authorSimon Glass <sjg@chromium.org>2012-01-11 12:42:25 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-02-12 10:11:22 +0100
commitcf06b139031670a8d06c88d5f3a31c284472f00e (patch)
tree811d99cd350520257909bcff09c9ee4a3ff1271b /arch/arm/cpu/armv7/tegra2/funcmux.c
parent8a1133c6074716d846b941fedfd6e0654e3f4292 (diff)
tegra: Add SDMMC support to funcmux
This adds support for SDMMC ports to the funcmux. Only one option is supported: FUNCMUXO_SDMMC_8BIT which selects an 8-bit wide SDIO interface where available. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv7/tegra2/funcmux.c')
-rw-r--r--arch/arm/cpu/armv7/tegra2/funcmux.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c
index 4fe6e06531..c1d2dfec5f 100644
--- a/arch/arm/cpu/armv7/tegra2/funcmux.c
+++ b/arch/arm/cpu/armv7/tegra2/funcmux.c
@@ -106,6 +106,69 @@ int funcmux_select(enum periph_id id, int config)
}
break;
+ case PERIPH_ID_SDMMC2:
+ if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
+ pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
+ pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
+
+ pinmux_tristate_disable(PINGRP_DTA);
+ pinmux_tristate_disable(PINGRP_DTD);
+ }
+ break;
+
+ case PERIPH_ID_SDMMC3:
+ switch (config) {
+ case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
+ pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
+
+ pinmux_tristate_disable(PINGRP_SLXA);
+ pinmux_tristate_disable(PINGRP_SLXC);
+ pinmux_tristate_disable(PINGRP_SLXD);
+ pinmux_tristate_disable(PINGRP_SLXK);
+ /* fall through */
+
+ case FUNCMUX_SDMMC3_SDB_4BIT:
+ pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
+
+ pinmux_tristate_disable(PINGRP_SDB);
+ pinmux_tristate_disable(PINGRP_SDC);
+ pinmux_tristate_disable(PINGRP_SDD);
+ bad_config = 0;
+ break;
+ }
+ break;
+
+ case PERIPH_ID_SDMMC4:
+ switch (config) {
+ case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
+ pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
+
+ pinmux_tristate_disable(PINGRP_ATC);
+ pinmux_tristate_disable(PINGRP_ATD);
+ break;
+
+ case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
+ pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
+ pinmux_tristate_disable(PINGRP_GME);
+ /* fall through */
+
+ case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
+ pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
+
+ pinmux_tristate_disable(PINGRP_ATB);
+ pinmux_tristate_disable(PINGRP_GMA);
+ bad_config = 0;
+ break;
+ }
+ break;
+
default:
debug("%s: invalid periph_id %d", __func__, id);
return -1;