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authorTom Rini <trini@ti.com>2015-01-22 11:24:11 -0500
committerTom Rini <trini@ti.com>2015-01-22 20:04:06 -0500
commit032c6867a2925c95897afe07d1f0678114254cf6 (patch)
tree880d379cab669b1a1da81c46a487987c1a6baf78 /arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
parent1d6a95011ffa25241c2e9c112893f6c6c96f2b46 (diff)
parent0ba924a4ecfe056ab637bfa207fc26cd0248e9ac (diff)
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c')
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
index b4dd799a88..b7c4b10969 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
@@ -21,8 +21,8 @@ void sg_init(void)
#endif
writel(tmp, SG_MEMCONF);
- /* Input ports must be enabled deasserting reset of cores */
+ /* Input ports must be enabled before deasserting reset of cores */
tmp = readl(SG_IECTRL);
- tmp |= 0x1;
+ tmp |= 1 << 6;
writel(tmp, SG_IECTRL);
}