diff options
| author | York Sun <yorksun@freescale.com> | 2015-11-04 10:03:23 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-12-13 18:27:28 -0800 |
| commit | 3901978d42b7008b13e7e9b67bea12a51cc5847b (patch) | |
| tree | df251b3cd312040e5108e8acdd9fa5cc2750acec /arch/arm/cpu/armv7 | |
| parent | c4243ac9e2713897a63dcdc3a96bf088fdb49866 (diff) | |
armv8/ls2080ardb: Update DDR settings for four chip-select case
When 4 chip-selects are used, vref should use range 1 and CDT uses 80 ohm,
and 2T timing is enabled.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
0 files changed, 0 insertions, 0 deletions