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authorMichal Simek <michal.simek@xilinx.com>2018-03-27 10:47:26 +0200
committerMichal Simek <michal.simek@xilinx.com>2018-04-09 12:14:48 +0200
commit95f7d6419d5effdd4379b6c5f0b1b831aedcc4a4 (patch)
tree37bdabe99a2c74b8055b5606cce7a24db3307ca9 /arch/arm/dts/zynqmp-zcu102-revA.dts
parent1077dc2889accae69b4aef149abfab2c7f9a3ca2 (diff)
arm64: zynqmp: Remove u-boot commands from dts files
U-Boot commands shouldn't be the part of kernel DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts')
-rw-r--r--arch/arm/dts/zynqmp-zcu102-revA.dts26
1 files changed, 10 insertions, 16 deletions
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index 60d3f71031..9f2b46cf76 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -144,12 +144,6 @@
sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
tca6416_u97: gpio@20 {
- /*
- * Enable all GTs to out from U-Boot
- * i2c mw 20 6 0 - setup IO to output
- * i2c mw 20 2 ef - setup output values on pins 0-7
- * i2c mw 20 3 ff - setup output values on pins 10-17
- */
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
@@ -193,7 +187,7 @@
};
};
- tca6416_u61: gpio@21 { /* FIXME enable it by i2c mw 21 6 0 */
+ tca6416_u61: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
@@ -224,7 +218,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
- i2c@0 { /* i2c mw 75 0 1 */
+ i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -280,7 +274,7 @@
shunt-resistor = <5000>;
};
};
- i2c@1 { /* i2c mw 75 0 1 */
+ i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
@@ -326,7 +320,7 @@
shunt-resistor = <5000>;
};
};
- i2c@2 { /* i2c mw 75 0 1 */
+ i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
@@ -409,7 +403,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
- i2c@0 { /* i2c mw 74 0 1 */
+ i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -426,7 +420,7 @@
reg = <0x54>;
};
};
- i2c@1 { /* i2c mw 74 0 2 */
+ i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
@@ -436,7 +430,7 @@
};
};
- i2c@2 { /* i2c mw 74 0 4 */
+ i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
@@ -449,7 +443,7 @@
clock-frequency = <300000000>;
};
};
- i2c@3 { /* i2c mw 74 0 8 */
+ i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
@@ -462,7 +456,7 @@
clock-frequency = <148500000>;
};
};
- i2c@4 { /* i2c mw 74 0 10 */
+ i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
@@ -503,7 +497,7 @@
reg = <2>;
/* SYSMON */
};
- i2c@3 { /* i2c mw 75 0 8 */
+ i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;