diff options
| author | Mingkai Hu <mingkai.hu@nxp.com> | 2016-07-05 16:01:55 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-07-26 09:02:23 -0700 |
| commit | b528b9377df0e738c6904a639a1e78810936f825 (patch) | |
| tree | ab3f786883fc5988efad56848cdc65dff803e34f /arch/arm/include/asm/arch-fsl-layerscape/soc.h | |
| parent | da4d620c90eb6dd9466a89837ab8667048d856e3 (diff) | |
armv8: fsl_lsch2: Add LS1046A SoC support
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 39e8c7a17c..8d4a7adb1d 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -44,6 +44,8 @@ struct cpu_type { #define SVR_LS1012A 0x870400 #define SVR_LS1043A 0x879200 #define SVR_LS1023A 0x879208 +#define SVR_LS1046A 0x870700 +#define SVR_LS1026A 0x870708 #define SVR_LS2045A 0x870120 #define SVR_LS2080A 0x870110 #define SVR_LS2085A 0x870100 |