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authorTom Rini <trini@ti.com>2015-02-02 12:37:34 -0500
committerTom Rini <trini@ti.com>2015-02-02 12:37:34 -0500
commit37ffffb98d78c46c840fa6e3c835d915c4247827 (patch)
tree9ecc87c3bdb7b3c821798fee7ef64bf73a5e597f /arch/arm/include/asm/arch-omap5/clock.h
parentade8bc14ad419f698406b162c9c5dfeee7406b4c (diff)
parentf3b4bc458de3285a04c5f60df6372ad5ca79fa60 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/clock.h')
-rw-r--r--arch/arm/include/asm/arch-omap5/clock.h20
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 0dc584b8ce..f8e5630bcb 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -236,13 +236,20 @@
#define VDD_MPU_ES2_LOW 880
#define VDD_MM_ES2_LOW 880
-/* TPS659038 Voltage settings in mv for OPP_NOMINAL */
-#define VDD_MPU_DRA752 1090
+/* DRA74x/75x voltage settings in mv for OPP_NOM per DM */
+#define VDD_MPU_DRA752 1100
#define VDD_EVE_DRA752 1060
#define VDD_GPU_DRA752 1060
-#define VDD_CORE_DRA752 1030
+#define VDD_CORE_DRA752 1060
#define VDD_IVA_DRA752 1060
+/* DRA72x voltage settings in mv for OPP_NOM per DM */
+#define VDD_MPU_DRA72x 1100
+#define VDD_EVE_DRA72x 1060
+#define VDD_GPU_DRA72x 1060
+#define VDD_CORE_DRA72x 1060
+#define VDD_IVA_DRA72x 1060
+
/* Efuse register offsets for DRA7xx platform */
#define DRA752_EFUSE_BASE 0x4A002000
#define DRA752_EFUSE_REGBITS 16
@@ -284,6 +291,13 @@
#define TPS659038_REG_ADDR_SMPS7 0x33
#define TPS659038_REG_ADDR_SMPS8 0x37
+/* TPS65917 */
+#define TPS65917_I2C_SLAVE_ADDR 0x58
+#define TPS65917_REG_ADDR_SMPS1 0x23
+#define TPS65917_REG_ADDR_SMPS2 0x27
+#define TPS65917_REG_ADDR_SMPS3 0x2F
+
+
/* TPS */
#define TPS62361_I2C_SLAVE_ADDR 0x60
#define TPS62361_REG_ADDR_SET0 0x0