diff options
| author | Tom Rini <trini@konsulko.com> | 2019-01-15 20:33:07 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-01-15 20:33:07 -0500 |
| commit | e807f6b5f9a164dc1fc35e1c733fa343acf335c0 (patch) | |
| tree | 73d8d68a2d4497ec6000f44d4ae8d4db80b40be2 /arch/arm/include/asm | |
| parent | d3689267f92c5956e09cc7d1baa4700141662bff (diff) | |
| parent | 03dcf17dba3dbd6f1cfe9ecaa0665ea8c11e0ef2 (diff) | |
Merge branch '2019-01-14-master-imports'
- MediaTek improvements (eth support)
- DM conversion for HI6220
- ISEE, Toby Churchill, other platform updates
- Various format code printf fixes
- Build race fixes
- Command repeat functionality enhanced, command autocomplete support
enhanced.
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mediatek/reset.h | 13 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h b/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h index f97b1eb29f..bb221e17e0 100644 --- a/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h +++ b/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h @@ -13,11 +13,16 @@ /* DEVICES */ #define REG_BASE_MCI 0xF9830000 #define REG_BASE_UART0 0xF8B00000 +#define HIOTG_BASE_ADDR 0xF98C0000 /* PERI control registers (4KB) */ /* USB2 PHY01 configuration register */ #define PERI_CTRL_USB0 (REG_BASE_PERI_CTRL + 0x120) + /* USB2 controller configuration register */ +#define PERI_CTRL_USB3 (REG_BASE_PERI_CTRL + 0x12c) +#define USB2_2P_CHIPID (1 << 28) + /* PERI CRG registers (4KB) */ /* USB2 CTRL0 clock and soft reset */ #define PERI_CRG46 (REG_BASE_CRG + 0xb8) diff --git a/arch/arm/include/asm/arch-mediatek/reset.h b/arch/arm/include/asm/arch-mediatek/reset.h new file mode 100644 index 0000000000..9704666d24 --- /dev/null +++ b/arch/arm/include/asm/arch-mediatek/reset.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 MediaTek Inc. + */ + +#ifndef __MEDIATEK_RESET_H +#define __MEDIATEK_RESET_H + +#include <dm.h> + +int mediatek_reset_bind(struct udevice *pdev, u32 regofs, u32 num_regs); + +#endif /* __MEDIATEK_RESET_H */ |